Method and system for virtual prototyping

A computer implemented method of embedded system design, the method comprising:

• selecting an instruction set accurate simulator of a target processor core;
• generating a virtual hardware component that is a finite state machine (FSM) representation of at least one hardware component, said generating comprising applying a design language having at least one graphical symbol and adapted to form an FSM representation of electronic hardware, each graphical symbol of the design language having a graphical portion and a user-definable textual portion defining the behavior of the graphical symbol;
• linking read, write, and interrupt signals of the instruction set accurate simulator of the target processor core with corresponding signals of the at least one virtual hardware component to form a virtual embedded system;
• creating a virtual test bench using a test bench builder for generating a graphical representation of at least one interactive test bench and for selecting signals or variables to be coupled to a graphical representation of a user interface for each interactive test bench;
• coupling the virtual test bench to at least one signal or variable of the virtual embedded system to simulate a human/machine interface;
• and
• coupling a software debugger to the virtual embedded system that is configured to load and run on the virtual embedded system at least one binary program executable of a software application compiled for the target processor core.

A method of designing an embedded system, the method comprising:

• defining a system architecture of the embedded system;
• generating a finite state machine (FSM) representation of at least one hardware element, said generating comprising applying a design language having at least one graphical symbol and adapted to form a finite state machine representation of electronic hardware, each graphical symbol of the design language having a graphical portion and a user-definable textual portion defining the behavior of the graphical symbol;
• designing a virtual prototype of the embedded system having an instruction set accurate simulator of a processor core and coupling read, write, and interrupt signals of the instruction set accurate simulator with said FSM representation of at least one hardware element;
• creating a virtual test bench having a graphical representation of a human/machine interface for interacting with the embedded system using a test bench builder for generating a graphical representation of at least one interactive test bench and for selecting signals or variables associated with the FSM and to be coupled to a graphical representation of a user interface for each interactive test bench;
• coupling the virtual prototype to a software debugger having a debugging interface and to the virtual test bench;
• developing at least one software application for the processor core;
• loading binary program code compiled from the at least one software application for execution on the virtual prototype;
• and
• initiating a simulation of the virtual prototype executing the at least one software application.

A method of providing information to potential suppliers for procuring a good or service associated with an embedded system, the method comprising:

• defining a system architecture of the embedded system;
• designing a virtual prototype of the embedded system, the virtual prototype having an instruction set accurate simulator of a target processor core and a finite state machine (FSM) representation of a hardware element within the embedded system, the FSM representation configured to couple memory read/write requests and interrupt signals with the instruction set accurate simulator of the target processor core, wherein generating said FSM representation comprises applying a design language having at least one graphical symbol and adapted to form a finite state machine representation of electronic hardware, each graphical symbol of the design language having a graphical portion and a user-definable textual portion defining the behavior of the graphical symbol;
• creating a virtual test bench having a graphical representation of a human/machine interface for interacting with the embedded system using a test bench builder for generating a graphical representation of at least one interactive test bench and for selecting signals or variables associated with the FSM and to be coupled to a graphical representation of a user interface for each interactive test bench;
• coupling the virtual prototype to the virtual test bench for emulating user interaction with the embedded system;
• publishing the virtual prototype as a functional specification from which a vendor may initiate a simulation of the operation of the embedded system.

A computer-implemented method for a vendor to acquire information for the procurement of a good or service related to an embedded system project, the method comprising:

• accessing a database of virtual prototypes of embedded systems, each of the virtual prototypes having a processor simulator, a finite state machine (FSM) representation of hardware peripherals, and a virtual test bench emulating a human/machine interface for interacting with a simulation of the operation of the virtual prototype,
• wherein generating said FSM representation comprises applying a design language having at least one graphical symbol and adapted to form a finite state machine representation of electronic hardware, each graphical symbol of the design language having a graphical portion and a user-definable textual portion defining the behavior of the graphical symbol, and
• wherein the virtual test bench is created using a test bench builder for generating a graphical representation of at least one interactive test bench and for selecting signals or variables associated with the FSM and to be coupled to a graphical representation of a user interface for the interactive test bench;
• instantiating an instance of one of the virtual prototypes;
• and
• evaluating the virtual prototype.