US 7,613,217 B2Granted

Semiconductor surface emitting device

AssigneeSumitomo Electric Industries, Ltd.

InventorsTsukuru Katsuyama, Jun-ichi Hashimoto

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Abstract

This surface emitting semiconductor device 1 comprises a first conductivity type semiconductor region, an active layer, a second conductivity type semiconductor layer and current block semiconductor region. The first conductivity type semiconductor region is provided on a surface made of GaAs semiconductor. The active layer is provided on the first conductivity type semiconductor region. The active layer has a side surface. The second conductivity type semiconductor layer is provided on the active layer. The second conductivity type semiconductor layer has a side surface. The current block semiconductor region is provided on the side surface of the active layer and on the side surface of the second conductivity type semiconductor layer. The active layer is made of III-V compound semiconductor including at least nitrogen element as a V group element.

Claims18

Dependent claims

A surface emitting semiconductor device comprising:

a first conductivity type semiconductor region, provided on a GaAs semiconductor region, including a primary surface having a first area and a second area;
a semiconductor mesa including an active layer and a second conductivity type semiconductor layer, said active layer being provided on said first area of said first conductivity type semiconductor region, said second conductivity type semiconductor layer being provided on said active layer, and said semiconductor mesa having a side surface;
a current block semiconductor region, provided on said second area of said first conductivity type semiconductor region and said side surface of said semiconductor mesa, for confining carriers to said semiconductor mesa;
a first DBR portion having a plurality of first DBR semiconductor layers and a plurality of second DBR semiconductor layers, said first DBR semiconductor layers and said second DBR semiconductor layers being arranged alternately;
and
a second DBR portion having a plurality of third DBR semiconductor layers and a plurality of fourth DBR semiconductor layers, said third DBR semiconductor layers and said fourth DBR semiconductor layers being arranged alternately;
wherein said first conductivity type semiconductor region, said active layer and said second conductivity type semiconductor layer are provided between said first DBR portion and said second DBR portion;
wherein said active layer is made of III-V compound semiconductor including at least nitrogen (N) as a V group member;
wherein said surface emitting semiconductor device further comprises an additional semiconductor layer made of III-V compound semiconductor;
wherein said additional semiconductor layer is provided between said first conductivity type semiconductor region and said active layer;
and
wherein a photoluminescence wavelength of said III-V compound semiconductor of said additional semiconductor layer is between that of said active layer and that of said first conductivity type semiconductor region.

9 more elements

A surface emitting semiconductor device comprising:

a first conductivity type semiconductor region, provided on a GaAs semiconductor region, including a primary surface having a first area and a second area;
a semiconductor mesa including an active layer and a second conductivity type semiconductor layer, said active layer being provided on said first area of said first conductivity type semiconductor region, said second conductivity type semiconductor layer being provided on said active layer, and said semiconductor mesa having a side surface;
a current block semiconductor region, provided on said second area of said first conductivity type semiconductor region and said side surface of said semiconductor mesa, for confining carriers to said semiconductor mesa;
a first DBR portion having a plurality of first DBR semiconductor layers and a plurality of second DBR semiconductor layers, said first DBR semiconductor layers and said second DBR semiconductor layers being arranged alternately;
and
a second DBR portion having a plurality of third DBR semiconductor layers and a plurality of fourth DBR semiconductor layers, said third DBR semiconductor layers and said fourth DBR semiconductor layers being arranged alternately;
wherein said first conductivity type semiconductor region, said active layer and said second conductivity type semiconductor layer are provided between said first DBR portion and said second DBR portion;
wherein said active layer is made of III-V compound semiconductor including at least nitrogen (N) as a V group member;
wherein said surface emitting semiconductor device further comprises an additional semiconductor layer made of III-V compound semiconductor;
wherein said additional semiconductor layer is provided between said second conductivity type semiconductor layer and said active layer;
and
wherein a photoluminescence wavelength of said III-V compound semiconductor of said additional semiconductor layer is between that of said active layer and that of said second conductivity type semiconductor layer.

9 more elements

A surface emitting semiconductor device comprising:

a first conductivity type semiconductor region, provided on a GaAs semiconductor region, including a primary surface having a first area and a second area;
a semiconductor mesa including an active layer and a second conductivity type semiconductor layer, said active layer being provided on said first area of said first conductivity type semiconductor region, said second conductivity type semiconductor layer being provided on said active layer, and said semiconductor mesa having a side surface;
a current block semiconductor region, provided on said second area of said first conductivity type semiconductor region and said side surface of said semiconductor mesa, for confining carriers to said semiconductor mesa;
a first DBR portion having a plurality of first DBR semiconductor layers and a plurality of second DBR semiconductor layers, said first DBR semiconductor layers and said second DBR semiconductor layers being arranged alternately;
and
a second DBR portion having a plurality of third DBR semiconductor layers and a plurality of fourth DBR semiconductor layers, said third DBR semiconductor layers and said fourth DBR semiconductor layers being arranged alternately;
wherein said first conductivity type semiconductor region, said active layer and said second conductivity type semiconductor layer are provided between said first DBR portion and said second DBR portion;
wherein said active layer is made of III-V compound semiconductor including at least nitrogen (N) as a V group member;
wherein said surface emitting semiconductor device further comprises a first SCH layer provided between said first conductivity type semiconductor region and said active layer;
and
a second SCH layer provided between said active layer and said second conductivity type semiconductor layer.

8 more elements

A surface emitting semiconductor device comprising:

a first conductivity type semiconductor region, provided on a GaAs semiconductor region, including a primary surface having a first area and a second area;
a semiconductor mesa including an active layer and a second conductivity type semiconductor layer, said active layer being provided on said first area of said first conductivity type semiconductor region, said second conductivity type semiconductor layer being provided on said active layer, and said semiconductor mesa having a side surface;
a current block semiconductor region, provided on said second area of said first conductivity type semiconductor region and said side surface of said semiconductor mesa, for confining carriers to said semiconductor mesa;
a first DBR portion having a plurality of first DBR semiconductor layers and a plurality of second DBR semiconductor layers, said first DBR semiconductor layers and said second DBR semiconductor layers being arranged alternately;
and
a second DBR portion having a plurality of third DBR semiconductor layers and a plurality of fourth DBR semiconductor layers, said third DBR semiconductor layers and said fourth DBR semiconductor layers being arranged alternately;
wherein said first conductivity type semiconductor region, said active layer and said second conductivity type semiconductor layer are provided between said first DBR portion and said second DBR portion;
wherein said active layer is made of III-V compound semiconductor including at least nitrogen (N) as a V group member;
wherein said surface emitting semiconductor device further comprises a first SCH layer provided between said first conductivity type semiconductor region and said active layer;
and a second SCH layer provided between said active layer and said second conductivity type semiconductor layer;
and
wherein said first and second SCH layers are made of one of AlX1Ga1-X1As semiconductor (0≦X1≦1) and GaX2In1-X2AsY2P1-Y2 semiconductor (about 0.5≦X2≦1, 0≦Y2≦1) lattice-matched to GaAs semiconductor.

9 more elements

The surface emitting semiconductor device comprising:

a first conductivity type semiconductor region, provided on a GaAs semiconductor region, including a primary surface having a first area and a second area;
a semiconductor mesa including an active layer and a second conductivity type semiconductor layer, said active layer being provided on said first area of said first conductivity type semiconductor region, said second conductivity type semiconductor layer being provided on said active layer, and said semiconductor mesa having a side surface;
a current block semiconductor region, provided on said second area of said first conductivity type semiconductor region and said side surface of said semiconductor mesa, for confining carriers to said semiconductor mesa;
a first DBR portion having a plurality of first DBR semiconductor layers and a plurality of second DBR semiconductor layers, said first DBR semiconductor layers and said second DBR semiconductor layers being arranged alternately;
and
a second DBR portion having a plurality of third DBR semiconductor layers and a plurality of fourth DBR semiconductor layers, said third DBR semiconductor layers and said fourth DBR semiconductor layers being arranged alternately;
wherein said first conductivity type semiconductor region, said active layer and said second conductivity type semiconductor layer are provided between said first DBR portion and said second DBR portion;
wherein said active layer is made of III-V compound semiconductor including at least nitrogen (N) as a V group member;
wherein said current block semiconductor region includes first and second current block layers;
wherein said first and second current block semiconductor layers are made of material not containing aluminum as a III group element;
wherein said first conductivity type semiconductor region is made of material not containing aluminum as a III group element;
and
wherein said second conductivity type semiconductor layer is made of material not containing aluminum as a III group element.

10 more elements

Dependencies are inferred from the claim text.

Facts

Application: 12/071,170Filed 15 Feb 2008 · division
Priority: JP P2003-28305530 Jul 2003
Published: US 2008/0151958 A126 Jun 2008
Granted: 3 Nov 2009
Term ends: Not estimatedThe source records don’t support an estimate.

Classification6 codes

H01S 5/18308
Having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]: having a special structure for lateral current or light…
H01S 5/2209
Based on III-V materials: gaInP based
H01S 5/222
Having special optical properties: having a refractive index lower than that of the cladding layers or outer guiding layers
H01S 5/3211
Comprising PN junctions, e.g. hetero- or double- heterostructures: characterised by special cladding layers, e.g. details on band-discontinuities

Family

Application10/822,142Parent of this division · filed 12 Apr 2004
US 2008/0151958 A1Pre-grant publication · published 26 Jun 2008
US 7,356,063 B2Parent of this division
US 2005/0135450 A1Published application
US 7,613,217 B2This patent

From the US filing history. Foreign family members aren’t listed.

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