Multi-port memory device
AssigneeHynix Semiconductor Inc.
InventorJin-Il Chung
Life of this patent
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Abstract
In a multi-port memory device, a plurality of ports simultaneously access a plurality of banks through global data buses. A data conflict detector compares valid data signals input from the plurality of ports through the global data buses to the plurality of banks, and detects data conflict caused when the valid data signals are simultaneously input to the same bank.
Claims11
A multi-port memory device, comprising:
- a plurality of banks;
- a plurality of ports for simultaneously accessing the plurality of banks;
- a plurality of global data buses;
- a data conflict detector for comparing valid data signals input from the plurality of ports through the global data buses to the plurality of banks, and detecting data conflict caused when the valid data signals are simultaneously input to the same bank;
- and
- a data conflict detection signal input/output (I/O) unit for receiving a data conflict detection signal output from the data conflict detector when the data conflict occurs between the valid data signals, and outputting the data conflict detection signal to an external device,
- wherein the data conflict detection signal I/O unit operates at a speed lower than the ports.
A multi-port memory device, comprising:
- a plurality of banks;
- a plurality of ports for performing a data communication with an external device in a serial input/output (I/O) interface scheme, and performing a parallel data communication with the plurality of banks by simultaneously accessing the plurality of banks;
- a first global data bus for supporting the parallel data communication between the plurality of ports and the plurality of banks;
- a bank controller for receiving valid data signals input from the plurality of ports through the first global data bus and transferring the received valid data signals to the banks, and comparing the valid data signals to detect data conflict caused when the valid data signals are simultaneously input to the same bank;
- and
- a data conflict detection signal input/output (I/O) unit for receiving a data conflict detection signal output from the bank controller when the conflict occurs between the valid data signals, and outputting the data conflict detection signal to an external device,
- wherein the data conflict detection signal I/O unit operates at a speed lower than the ports.
A method for detecting a data conflict of a multi-port memory device having a plurality of ports performing a serial input/output (I/O) communication with external devices, and a plurality of banks performing a parallel I/O communication with the ports through a plurality of global data buses, comprising steps of:
- receiving valid data signals input from the external devices in series;
- transferring the valid data signals to the banks from the plurality of ports through the global data buses in parallel;
- detecting a data conflict caused when the valid data signals are simultaneously input to the same bank by comparing the valid data signals;
- and
- generating and outputting a data conflict detection signal to the external devices when the data conflict occurs between the valid data signals,
- wherein the data conflict detection signal is generated and outputted at a speed lower than the ports.
Dependencies are inferred from the claim text.