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US 7,613,064 B1Granted
Power management modes for memory devices
AssigneeNVIDIA Corporation
InventorsBarry A. Wagner, Andrew R. Bell, Thomas E. Dewey, Russell R. Newcomb
Life of this patent
Estimating the term…
Abstract
Embodiments of power management modes for memory devices are disclosed.
Claims19
A memory device, comprising:
- one or more memory banks;
- timing logic to periodically perform self-refresh of said one or more memory banks;
- locking logic to at least partially maintain synchronization between an internal clock of the memory device and an external clock during performance of first and second modes, wherein said self-refresh is performed during said second mode;
- and
- a locking logic controller to control one or more portions of said locking logic, wherein said locking logic controller is adapted to reduce an amount of power supplied to the locking logic during said performance of said self-refresh.
2 more elements
A system, comprising:
- a computing platform;
- a processor coupled to the computing platform;
- and
- a dynamic random access memory (DRAM) device coupled to the computing platform, the DRAM device comprising:
- one or more memory banks;
- timing logic to periodically perform self-refresh of said one or more memory banks;
- locking logic to at least partially maintain synchronization between an internal clock of the memory device and an external clock during performance of first and second modes, wherein said self-refresh is performed during said second mode;
- and
- a locking logic controller to control one or more portions of said locking logic wherein said locking logic controller is adapted to reduce an amount of power supplied to the locking logic during said performance of said self-refresh.
6 more elements
A method, comprising:
- Enabling a self-refresh mode for a memory device, wherein synchronization between an internal clock of the memory device and an external clock is at least partially maintained by locking logic, wherein an amount of power supplied to the locking logic is reduced during said self-refresh mode, wherein at least partially maintaining synchronization comprises:
- storing lock data, wherein the lock data comprises a previously locked synchronization value of the locking logic of the memory device;
- and
- adjusting the lock data based, at least in part, on one or more of a temperature drift or a voltage change of said memory device.
1 more element
Dependencies are inferred from the claim text.