Method and apparatus for idle cycle refresh request in DRAM

A logic system for refreshing a dynamic random access memory, comprising:

• a logic circuit for determining if a refresh of the dynamic random access memory is required;
• and
• a logic circuit for allocating an idle cycle sequence to refresh at least a portion of the dynamic random access memory only if the determining step determines that a refresh of the dynamic random access memory is required;
• wherein the logic circuit for determining determines if a refresh of the dynamic random access memory is required based on real-time conditions.

A system for refreshing a dynamic random access memory, comprising:

• a memory;
• and
• at least one processor, coupled to the memory, operative to:
• determine if a refresh of said dynamic random access memory is required;
• and
• allocate an idle cycle sequence to refresh at least a portion of said dynamic random access memory only if said determining step determines that a refresh of said dynamic random access memory is required;
• wherein said processor determines if a refresh of said dynamic random access memory is required based on real-time conditions.