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US 7,613,046 B2Granted
Nonvolatile semiconductor memory device carrying out simultaneous programming of memory cells
AssigneeKabushiki Kaisha Toshiba
InventorsNoboru Shibata, Tomoharu Tanaka
Life of this patent
Estimating the term…
Abstract
A memory cell array has a first and a second storage area. The first storage area has a memory element selected by an address signal. The second storage area has a memory element selected by a control signal. A control circuit has a fuse element. When the fuse element has been blown, the control circuit inhibits at least one of writing and erasing from being done on the second storage area.
Claims3
A semiconductor memory device comprising:
- a plurality of memory elements to which data is written by a write operation;
- and
- a control circuit, wherein:
- in a first write sequence, the control circuit simultaneously stores data in “n” (“n” being a natural number) numbers of said plurality of the memory elements in the write operation and then the control circuit repeats the write operation and a verify operation if any of said “n” numbers of the memory elements are memory elements written insufficiently in the verify operation;
- and
- in a second write sequence, the control circuit simultaneously stores data in “n” (“n” being a natural number) numbers of said plurality of the memory elements in the write operation and then the control circuit repeats the write operation and a verify operation if “k” (“k” being a natural number which is equal to or less than “n”) or greater numbers of said “n” numbers of the memory elements are memory elements written insufficiently in the verify operation.
3 more elements
Dependencies are inferred from the claim text.