Magnetic memory device and method of writing into the same

A method of writing into a magnetic memory device comprising:

• when a first memory information is written into a memory cell, a first write current is flowed to a first signal line, a second write current being directed opposite to the first write current is flowed to a second signal line, and a third write current is flowed to a third signal line to apply to a first magnetoresistance effect element a synthetic magnetic field of a magnetic field generated by the first write current and a magnetic field generated by the third write current and apply to a second magnetoresistance effect element a synthetic magnetic field of a magnetic field generated by the second write current and a magnetic field generated by the third write current, and
• when a second memory information is written in the memory cell, a fourth write current which is directed opposite to the first write current is flowed to the first signal line, a fifth write current of the same direction as the first write current is flowed to the second signal line, a sixth write current of the same direction as the third write current is flowed to the third signal line to apply the first magnetoresistance effect element a synthetic magnetic field of a magnetic field generated by the fourth write current and a magnetic field generated by the sixth write current and apply to the second magnetoresistance effect element a synthetic magnetic field of a magnetic field generated by the fifth write current and a magnetic field generated by the sixth write current,
• wherein the magnetic memory device including the memory cell including the first magnetoresistance effect element, the second magnetoresistance effect element having one terminal connected to one terminal of the first magnetoresistance effect element, and a select transistor connected to a connection node of the first magnetoresistance effect element and the second magnetoresistance effect element;
• the first signal line extended in a first direction and connected to the other end of the first magnetoresistance effect element;
• the second signal line extended in the first direction and connected to the other end of the second magnetoresistance effect element;
• and the third signal line extended in a second direction crossing the first direction, crossing the first signal line in a region where the first magnetoresistance effect element is formed, and crossing the second signal line in the region where the second magnetoresistance effect element is formed, wherein the magnetic memory device memorizes the first memory information with the first magnetoresistance effect element being in a high resistance state and the second magnetoresistance effect element being in a lower resistance state or the second memory information with the first magnetoresistance effect element being in the lower resistance state and the second magnetoresistance effect element being in the high resistance state.

A magnetic memory device comprising:

• a memory cell including a first magnetoresistance effect element, a second magnetoresistance effect element having one terminal connected to one terminal of the first magnetoresistance effect element, and a select transistor connected to a connection node of the first magnetoresistance effect element and the second magnetoresistance effect element;
• a first signal line extended in a first direction and connected to the other end of the first magnetoresistance effect element;
• a second signal line extended in the first direction and connected to the other end of the second magnetoresistance effect element;
• a third signal line extended in a second direction crossing the first direction, crossing the first signal line in a region where the first magnetoresistance effect element is formed, and crossing the second signal line in the region where the second magnetoresistance effect element is formed,
• a fourth signal line extended in the first direction and connected to the connection node of the memory cell via the select transistor;
• and
• another memory cell formed adjacent to said memory cell in the first direction, wherein
• the select transistors of said memory cell and said another memory cell are formed in one active region, and a contact connecting the select transistors of said memory cell and said another memory cells to the fourth signal line are in common.