Liquid crystal display having a defect repair mechanism interposed between a light shielding storage line and a light shielding output electrode

A liquid crystal display comprising:

• a liquid crystal display panel including an array substrate, a color filter substrate opposite to the array substrate, and
• a liquid crystal layer interposed between the array substrate and the color filter substrate;
• and
• a driver driving the liquid crystal display panel, and
• wherein the array substrate comprises:
• a base substrate;
• a plurality of gate lines provided over the base substrate and separated from each other by a first interval;
• a plurality of data lines provided over the base substrate, insulated from the gate lines while crossing the gate lines, and separated from each other by a second interval larger than the first interval, thereby defining a plurality of pixel areas;
• and
• a plurality of pixel units aligned correspondingly to the pixel areas,
• each pixel unit comprising:
• a switching device electrically connected to a corresponding present gate line and a corresponding present data line;
• a pixel electrode electrically connected to an output electrode of the switching device;
• a storage line which is provided on the base substrate and overlapped with an edge part of the pixel electrode to receive a common voltage;
• and
• a repair electrode branching from a previous gate line such that the repair electrode is partially overlapped with the pixel electrode,
• wherein the output electrode comprises an extension portion that extends along at least two lateral sides of the pixel electrode and that is fully overlapped with the pixel electrode;
• wherein the extension portion of the output electrode of the switching device is bent in parallel to the previous gate line and extends along the edge portion of the pixel electrode so as to be fully overlapped with the pixel electrode, and to be separated from the storage line by a predetermined interval;
• and
• wherein the repair electrode is interposed between one end part of the extension portion and the storage line at the edge portion of the pixel electrode.

An array substrate comprising:

• a base substrate;
• a plurality of gate lines provided over the base substrate;
• a plurality of data lines provided over the base substrate, insulated from the gate lines while crossing the gate lines thereby defining a plurality of pixel areas;
• and
• a plurality of pixel units aligned correspondingly to the pixel areas,
• each pixel unit comprising:
• a switching device electrically connected to a corresponding present gate line and a corresponding present data line;
• a pixel electrode electrically connected to an output electrode of the switching device;
• and
• a storage line which is provided on the base substrate to receive a common voltage and overlapped with an edge portion of the pixel electrode;
• and
• a repair electrode branching from a previous gate line such that the repair electrode overlaps with the pixel electrode,
• wherein the output electrode comprises an extension portion that extends along the edge portion of the pixel electrode,
• an end part of the extension portion is separated from the storage line by a predetermined interval at the edge portion of the pixel electrode, and the repair electrode is interposed between an end part of the extension portion and the storage line at the edge portion.

An array substrate comprising:

• a light-passing base substrate;
• a plurality of gate lines provided over the base substrate and separated from each other by a first interval;
• a plurality of data lines provided over the base substrate, insulated from the gate lines while crossing the gate lines, and separated from each other by a second interval larger than the first interval, thereby defining a plurality of pixel areas;
• and
• a plurality of pixel units aligned correspondingly to the pixel areas,
• each pixel unit comprising:
• a switching device having a gate electrode electrically connected to a corresponding first gate line and having a source region electrically connected to a corresponding first data line;
• a pixel electrode electrically connected to an output electrode of the switching device, the pixel electrode having a peripheral boundary including relatively long first and second edges opposed to one another, and substantially shorter third and fourth edges also opposed to one another;
• a light leakage blocking structure disposed substantially along and around the peripheral boundary of the pixel electrode and configured to substantially block light from leaking past the pixel electrode by passing through on an exterior side of the peripheral boundary of the pixel electrode;
• and
• a repair electrode branching from a second gate line outside of, but adjacent to the pixel unit such that the repair electrode protrudes through the light leakage blocking structure and such that the repair electrode is in spaced-apart overlapping relation with the pixel electrode and selectively connectable to the pixel electrode;
• wherein a first portion of the light leakage blocking structure is defined by a storage line which is provided on the base substrate to receive a common voltage and which is capacitively coupled to the pixel electrode;
• wherein the storage line extends substantially along the relatively long second edge of the peripheral boundary of the pixel electrode;
• wherein a second portion of the light leakage blocking structure is defined by the output electrode of the switching device extending substantially along the relatively long first edge of the peripheral boundary and extending parallel to the second gate line, the output electrode further bending to substantially extend along the relatively shorter third edge of the pixel electrode peripheral boundary so as to be overlapped with the pixel electrode;
• and
• wherein one end part of the output electrode is spaced apart from a neighboring portion of the storage line by a predetermined interval defined along the relatively long first edge of the peripheral boundary and the repair electrode is disposed in a location between the one end part of the output electrode and a spaced apart neighboring portion of the storage line.