Array substrate for in-plane switching mode liquid crystal display device and method of manufacturing the same

A substrate for a liquid crystal display device, comprising:

• a substrate;
• gate lines along a first direction on the substrate;
• data lines along a second direction on the substrate, the data lines crossing the gate lines to define pixel regions, each of the pixel regions having first and second areas along the second direction;
• a thin film transistor on the substrate at each crossing point of the gate and data lines;
• a pixel electrode on the substrate in each of the pixel regions, the pixel electrode electrically connected to the thin film transistor and including a first vertical part and a second vertical part;
• and
• a common electrode on the substrate in each of the pixel regions, the common electrode including a first vertical portion and a second vertical portion, the first vertical part and the first vertical portion at a first side of each of the data lines, and the second vertical part and the second vertical portion at a second side of each of the data lines,
• wherein the first vertical part and the first vertical portion are disposed in a line parallel to the data lines, and the second vertical part and the second vertical portion are disposed in a line parallel to the data lines.

A substrate for a liquid crystal display device, comprising:

• a substrate;
• a gate line along a first direction on the substrate;
• a data line along a second direction and crossing the gate line to define a pixel region;
• a thin film transistor on the substrate and electrically connected to the gate and data lines;
• a pixel electrode in the pixel region and connected to the thin film transistor;
• and
• a common electrode in the pixel region, wherein a first capacitance between the data line and the common and pixel electrodes at a first side of the data line is substantially equal to a second capacitance between the data line and the common and pixel electrodes at a second side of the data line,
• wherein a first vertical part of the pixel electrode and a first vertical portion of the common electrode are disposed in a line parallel to the data line, and a second vertical part of the pixel electrode and a second vertical portion of the common electrode are disposed in a line parallel to the data line.

A method of manufacturing a substrate for a liquid crystal display device, comprising:

• forming a gate line along a first direction on a substrate;
• forming a data line along a second direction, the data line crossing the gate line to define a pixel region, the pixel region having first and second sides opposing one another and first and second areas along the second direction;
• forming a thin film transistor electrically connected to the gate and data lines;
• forming a first vertical part of a pixel electrode on the substrate at the first side within the first area;
• forming a second vertical part of the pixel electrode on the substrate at the second side within the second area, the pixel electrode electrically connected to the thin film transistor;
• forming a first vertical portion of a common electrode on the substrate at the first side within the second area;
• and
• forming a second vertical portion of the common electrode on the substrate at the second side within the first area,
• wherein the first vertical part and the first vertical portion are disposed in a line parallel to the data line, and the second vertical part and the second vertical portion are disposed in a line parallel to the data line.

A method of manufacturing a substrate for a liquid crystal display device, comprising:

• forming a gate line, a gate electrode, and a common line on a substrate, the gate line and the common line extending along a first direction;
• forming a gate insulating layer on the gate line, the gate electrode and the common line;
• forming an active layer and an ohmic contact layer on the gate insulating layer over the gate electrode;
• forming a data line, a source electrode and a drain electrode on the ohmic contact layer, the data line extending along a second direction and crossing the gate line to define a pixel region, the pixel region including first and second areas along the second direction;
• forming a passivation layer covering the data line, the source electrode and the drain electrode, the passivation layer including a first contact hole and second contact holes, the first contact hole exposing the drain electrode, the second contact holes exposing the common line;
• and
• forming a pixel electrode and a common electrode in the pixel region on the passivation layer, the pixel electrode including a first vertical part and a second vertical part, the common electrode including a first vertical portion and a second vertical portion,
• wherein the first vertical part and the first vertical portion are formed at a first side of the data line, and the second vertical part and the second vertical portion are formed at a second side of the data line, wherein the first vertical part and the first vertical portion are disposed in a line parallel to the data line, and the second vertical part and the second vertical portion are disposed in a line parallel to the data line.