Display driver and electronic instrument including display driver

A display driver, comprising:

• a scan driver and a data driver that drive a display panel;
• a one-time PROM (OTP) circuit that includes a plurality of OTP cells;
• a control circuit;
• and
• a control register,
• a display characteristic parameter corresponding to display characteristics of the display panel being written into the OTP circuit during initialization,
• the control register storing the display characteristic parameter supplied from the OTP circuit,
• each of the plurality of OTP cells including a floating-gate transistor that has a floating gate,
• the control circuit outputting a read signal to the OTP circuit when the control circuit reads the display characteristic parameter from the OTP circuit,
• the control circuit outputting a write signal to the OTP circuit when writing the display characteristic parameter into the OTP circuit,
• the control circuit performing a refresh operation at a predetermined timing set in a first half of a non-display period of the display panel, the refresh operation including reading the display characteristic parameter from the OTP circuit and rewriting the display characteristic parameter into the control register,
• each of the plurality of OTP cells including a decision transistor provided between a node of a first power supply and a node of a second power supply,
• a reference voltage being input to a gate of the decision transistor,
• each of the plurality of OTP cells including:
• a first output transistor provided in series with the decision transistor between the node of the first power supply and the node of the second power supply;
• and
• a second output transistor provided between the node of the second power supply and a first node that is connected to a gate of the first output transistor,
• a drain and a gate of the second output transistor being connected to the first node,
• each of the plurality of OTP cells including a read transistor provided between the first node and a second node that is connected to a drain of the floating-gate transistor, and
• the read signal being input to a gate of the read transistor.

A display driver, comprising:

• a scan driver and a data driver that drive a display panel;
• a one-time PROM (OTP) circuit that includes a plurality of OTP cells;
• a control circuit;
• and
• a control register,
• a display characteristic parameter corresponding to display characteristics of the display panel being written into the OTP circuit during initialization,
• the control register storing the display characteristic parameter supplied from the OTP circuit,
• each of the plurality of OTP cells including a floating-gate transistor that has a floating gate,
• the control circuit outputting a read signal to the OTP circuit when the control circuit reads the display characteristic parameter from the OTP circuit,
• the control circuit outputting a write signal to the OTP circuit when writing the display characteristic parameter into the OTP circuit,
• the control circuit performing a refresh operation at a predetermined timing set in a first half of a non-display period of the display panel, the refresh operation including reading the display characteristic parameter from the OTP circuit and rewriting the display characteristic parameter into the control register,
• each of the plurality of OTP cells including a decision transistor provided between a node of a first power supply and a node of a second power supply,
• a reference voltage being input to a gate of the decision transistor,
• each of the plurality of OTP cells including:
• a first output transistor provided in series with the decision transistor between the node of the first power supply and the node of the second power supply;
• and
• a second output transistor provided between the node of the second power supply and a first node that is connected to a gate of the first output transistor,
• a drain and a gate of the second output transistor being connected to the first node,
• the OTP circuit including a reference cell that includes the floating-gate transistor, and
• the reference cell generating the reference voltage.