US 7,612,599 B2Granted

Semiconductor device

AssigneeHitachi, Ltd.

InventorsMinoru Motoyoshi, Yasuhiro Fujimura, Shigeru Nakahara

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Abstract

Clock skew can be reduced by suppressing fluctuation in wiring leads between the final stage clock buffers and the clock distribution circuit for supplying the clock. In view of attaining such reduction of clock skew, an upstream of the clock distribution circuit is formed in an H tree structure and the final stage is formed in a local fishbone structure. A plurality of main clock lines connected to the final stage buffer include a first main clock line and a second main clock line. The number of cell arrangement allowable rows where a plurality of first flip-flops for receiving the clock from the first main clock line are located is different from the number of cell arrangement allowable rows where a plurality first flip-flops for receiving the clock from the second main clock line are located.

Claims10

Dependent claims

A semiconductor device including a plurality of metal wiring layers, comprising:

a clock distribution circuit including a plurality of main clock lines connected to any of a plurality of buffers forming the final stage clock buffers and a plurality of final stage buffers;
and
a plurality of flip-flops for receiving a clock from any line of the plurality of main clock lines,
wherein the plurality of main clock lines are extended in a first direction,
wherein the first direction is identical to the direction where a main power supply line of the lowest layer formed on the metal wiring layer is extended,
wherein a cell arrangement allowable row is defined with an adjacent main power supply line,
wherein the plurality of main clock lines include a first main clock line and a second main clock line, and
wherein the number of cell arrangement allowable rows where a plurality of first flip-flops for receiving the clock from the first main clock line are located is different from the number of cell arrangement allowable rows where the plurality of first flip-flops for receiving the clock from the second main clock line are located.

5 more elements

Dependencies are inferred from the claim text.