Semiconductor circuits
AssigneeNanya Technology Corporation
InventorWen-Chang Cheng
Life of this patent
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Abstract
Semiconductor circuit capable of selecting a corresponding adjusting parameter to adjust the received signal according to different voltages and frequencies. A voltage detector detects a voltage level of an external power voltage to generate a voltage detection signal, a frequency detector detects frequency of a main clock to generate a frequency detection signal, and a signal adjustment unit receives a first signal and selects one of a plurality of different adjusting parameters to adjust the first signal according to the voltage detection signal and the frequency detection signal.
Claims18
A semiconductor circuit, comprising:
- a voltage detector detecting a voltage level of an external power voltage to generate a voltage detection signal;
- a frequency detector detecting frequency of a main clock to generate a frequency detection signal;
- and
- a signal adjustment unit receiving a first signal, and selecting one of a plurality of different adjusting parameters to adjust the first signal to generate a plurality of second signals and selectively output one of the second signals according to the voltage detection signal and the frequency detection signal.
A semiconductor memory module, comprising:
- a clock generator generating a main clock;
- and
- a core logic unit powered by an external power voltage and comprising:
- a voltage detector detecting a voltage level of the external power voltage to generate a voltage detection signal;
- a frequency detector detecting frequency of the main clock to generate a frequency detection signal;
- and
- a signal adjustment unit receiving a first signal, and obtaining a present operating region of the core logic unit and selecting one of a plurality of different parameters to adjust the first signal to generate a plurality of second signals and selectively output one of the second signals according to the voltage detection signal and the frequency detection signal.
A signal adjustment method, comprising:
- detecting a voltage level of an external power voltage of a chip to generate a voltage detection signal;
- detecting frequency of a main clock of the chip to generate a frequency detection signal;
- obtaining a present operating region of the chip according to the voltage detection signal and the frequency detection signal;
- and
- selecting one of a plurality of adjusting parameters to adjust a first signal in the chip to generate a plurality of second signals and selectively output one of the second signals according to the obtained present operating region.
Dependencies are inferred from the claim text.