Output circuit of semiconductor device and semiconductor device including thereof

An output circuit of a semiconductor device that can dynamically change over between ODT impedances of a driver circuit, the output circuit comprising:

• a first selecting circuit that selects any one ODT impedance group out of a plurality of ODT impedance groups;
• a second selecting circuit that selects a predetermined ODT impedance out of the selected ODT impedance group;
• and
• a synchronizing circuit that is provided between the first selecting circuit and the second selecting circuit and that controls the operation timing of the driver circuit,
• wherein the first selecting circuit selects one ODT impedance group out of the plurality ODT impedance groups, based on the output of a counter that operates synchronously with the synchronizing circuit.

A semiconductor device having an output circuit, the output circuit comprising:

• a counter circuit that generates an ODT control signal;
• a plurality of driver circuits having an ODT function;
• a first selecting circuit that activates one of a plurality of ODT selection signals based on the ODT control signal;
• a synchronizing circuit that synchronizes an activated ODT selection signal with a predetermined clock;
• and
• a second selecting circuit that selects one or more driver circuits to be activated out of the plurality of driver circuits based on the activated ODT selection signal,
• wherein the first selecting circuit is provided between the counter circuit and the synchronizing circuit, and the second selecting circuit is provided between the synchronizing circuit and the driver circuit.

A data processing system comprising a data processor and a semiconductor memory device, wherein the semiconductor memory device includes an output circuit, the output circuit having:

• a counter circuit that generates an ODT control signal;
• a plurality of driver circuits having an ODT function;
• a first selecting circuit that activates one of a plurality of ODT selection signals based on the ODT control signal;
• a synchronizing circuit that synchronizes an activated ODT selection signal with a predetermined clock;
• and
• a second selecting circuit that selects one or more driver circuits to be activated out of the plurality of driver circuits based on the activated ODT selection signal,
• wherein the first selecting circuit is provided between the counter circuit and the synchronizing circuit, and the second selecting circuit is provided between the synchronizing circuit and the driver circuit.