Non-volatile memory cell
AssigneeKabushiki Kaisha Toshiba
InventorsYoshio Ozawa, Shigehiko Saida, Yuji Takeuchi, Masanobu Saito
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Abstract
A semiconductor device comprises a semiconductor substrate, and a non-volatile memory cell provided on the semiconductor substrate, the non-volatile memory cell comprising a tunnel insulating film having a film thickness periodically and continuously changing in a channel width direction of the non-volatile memory cell, a floating gate electrode provided on the tunnel insulating film, a control gate electrode provided above the floating gate electrode, and an interelectrode insulating film provided between the control gate electrode and the floating gate electrode.
Claims4
A semiconductor device comprising:
- a semiconductor substrate having at least two isolation trenches that are approximately parallel to each other;
- and
- a non-volatile memory cell provided on the semiconductor substrate,
- the non-volatile memory cell comprising:
- a tunnel insulating film having a film thickness changing continuously and with three or more periodic, undulating intervals between successive and similar changes in a channel width direction of the non-volatile memory cell, wherein the channel width direction is approximately perpendicular to the isolation trenches;
- a floating gate electrode provided on the tunnel insulating film;
- a control gate electrode provided above the floating gate electrode;
- and
- an interelectrode insulating film provided between the control gate electrode and the floating gate electrode.
A semiconductor device comprising:
- a semiconductor substrate having at least two isolation trenches that are approximately parallel to each other;
- and
- a non-volatile memory cell provided on the semiconductor substrate,
- the non-volatile memory cell comprising:
- a tunnel insulating film having an approximately constant film thickness, a height of an interface between the tunnel insulating film and the semiconductor substrate changing continuously and with three or more periodic, undulating intervals between successive and similar changes in a channel width direction of the non-volatile memory cell, wherein the channel width direction is approximately perpendicular to the isolation trenches;
- a floating gate electrode provided on the tunnel insulating film, a height of an interface between the floating gate electrode and the tunnel insulating film changing continuously and with three or more periodic, undulating intervals between successive and similar changes in the channel width direction of the non-volatile memory cell;
- a control gate electrode above the floating gate electrode;
- and
- an interelectrode insulating film provided between the control gate electrode and the floating gate electrode.
Dependencies are inferred from the claim text.