US 7,612,389 B2 · Embedded SiGe stressor with tensile strain for NMOS current enhancement

Abstract

MOS devices having localized stressors are provided. Embodiments of the invention comprise a gate electrode formed over a substrate and source/drain regions formed on either side of the gate electrode. The source/drain regions include an embedded stressor and a capping layer on the embedded stressor. Preferably, the embedded stressor has a lattice spacing greater than the substrate lattice spacing. In a preferred embodiment, the substrate is silicon and the embedded stressor is silicon germanium. A method of manufacturing is also provided, wherein strained PMOS and NMOS transistors may be formed simultaneously.

Claims24

Dependent claims

A semiconductor device comprising:

a gate electrode formed over a substrate;
a pair of sidewall spacers formed on opposite sides of the gate electrode, wherein the sidewall spacers are in contact with at least a portion of a top surface of a capping layer;
and
NMOS source/drain regions formed on either side of the gate electrode,
wherein the NMOS source/drain regions comprise an embedded stressor and a capping layer on the embedded stressor, wherein the embedded stressor has a lattice spacing greater than a substrate lattice spacing and the capping layer has a lattice spacing less than the substrate lattice spacing.

2 more elements

Dependencies are inferred from the claim text.

Facts

Application

11/227,592Filed 15 Sep 2005

Published

US 2007/0057287 A115 Mar 2007

Granted

3 Nov 2009

Term ends

Not estimatedThe source records don’t support an estimate.

Classification5 codes

H10D 62/371
Of igfets: inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
H10D 30/608
Having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs: having non-planar bodies, e.g. having recessed gate electrodes
H10D 30/797
Arrangements for exerting mechanical stress on the crystal lattice of the channel regions: being in source or drain regions, e.g. SiGe source or drain
H10D 62/021
Manufacture or treatment: forming source or drain recesses by etching e.g. recessing by etching and then refilling

Embedded SiGe stressor with tensile strain for NMOS current enhancement

Life of this patent

Embedded SiGe stressor with tensile strain for NMOS current enhancement

Life of this patent

Abstract

Claims24