Non-volatile memory devices having cell diodes

An integrated circuit memory cell, comprising

• a substrate having a first semiconductor region of first conductivity type therein;
• an electrically insulating layer on said substrate, said electrically insulating layer having an opening therein that extends opposite a recess in the first semiconductor region;
• a first insulating spacer on a sidewall of the recess in the first semiconductor region;
• a diode in the opening, said diode having a first terminal electrically coupled to a bottom of the recess in the first semiconductor region;
• variable resistivity material region electrically coupled to a second terminal of said diode;
• and
• wherein the electrically insulating layer and the first insulating spacer are formed of different dielectric materials.

A phase-change memory device comprising:

• a signal line that is a first-type impurity region disposed on a semiconductor substrate;
• an electrically insulating layer formed on the substrate having the signal line;
• a cell contact hole passing through the electrically insulating layer and extending to an upper region of the signal line;
• a sidewall insulating layer formed on portions of the signal line exposed by sidewalls of the cell contact hole;
• a vertical cell diode disposed in a lower region of the cell contact hole having the sidewall insulating layer therein, the vertical cell diode including a first-type high-concentration semiconductor, a first-type low-concentration semiconductor, and a second-type semiconductor, which are sequentially stacked;
• a lower electrode disposed in an upper region of the cell contact hole, the lower electrode being electrically connected to the vertical cell diode;
• a phase-change material pattern disposed on the electrically insulating layer covering the lower electrode;
• and
• an upper electrode disposed on the phase-change material pattern.

An integrated circuit memory cell, comprising:

• a semiconductor substrate of second conductivity type having a semiconductor word line of first conductivity type thereon that forms a P-N rectifying junction with said semiconductor substrate;
• an electrically insulating layer on the word line, said electrically insulating layer having an opening therein aligned with a recess in the word line, said recess having a bottom extending below an interface between said electrically insulating layer and an upper surface of the word line;
• an electrically insulating spacer on a sidewall of the recess, said electrically insulating spacer and said electrically insulating layer comprising different materials;
• a diode in the opening in said electrically insulating layer, said diode having a first terminal electrically coupled to a bottom of the recess in said word line;
• and
• a variable resistivity material region electrically coupled to a second terminal of said diode.