Semiconductor device having high drive current and method of manufacture therefor

A method comprising:

• forming first and second gate structures of first and second semiconductor devices in a semiconductor substrate, the first and second gate structures being electrically isolated from one another, the first and second gate structures each having a hard mask;
• forming a first spacer on either side of the first gate structure;
• forming recesses on either side of the first gate structure;
• filling in the recesses on either side of the first gate structure to form raised source and drain regions;
• forming lightly doped drains on either side of the second gate structure;
• forming lightly doped drains on either side of the first gate structure;
• forming a spacer on either side of the first gate structure and the second gate structure over a liner oxide layer;
• forming recesses on either side of the second gate structure in the substrate and outside of the spacer;
• forming deeper and more heavily doped source and drain regions in the substrate on either side of the second gate structure;
• forming deeper and more heavily doped source and drain regions in the substrate on either side of the first gate structure;
• forming contacts over the gate, source and drain regions of the first and second semiconductor devices;
• and
• forming an etch stop layer over the first and second semiconductor devices.

A method comprising:

• forming first and second gate structures of first and second semiconductor devices in a semiconductor substrate, the first and second gate structures being electrically isolated from one another, the first and second gate structures each having a hard mask;
• forming a spacer on either side of the first gate structure over the offset spacer;
• forming recesses on either side of the first gate structure and partially extending under the dummy spacer;
• filling in the recesses on either side of the first gate structure to form raised source and drain regions;
• removing the hard masks;
• forming a spacer on either side of the first gate structure and the second gate structure;
• forming recesses on either side of the second gate structure in the substrate and outside of the spacer;
• adding dopants to the substrate on either side of the second gate structure to form recessed source and drain doped regions;
• and
• adding dopants to the substrate on either side of the first gate structure to form raised source and drain doped regions.

A method comprising:

• forming first and second gate structures of first and second semiconductor devices in a semiconductor substrate, the first and second gate structures being electrically isolated from one another, the first and second gate structures each having a hard mask;
• forming an offset spacer on either side of the first gate structure and on either side of the second gate structure;
• forming a dummy spacer on either side of the first gate structure over the offset spacer;
• forming recesses on either side of the first gate structure and partially extending under the dummy spacer;
• filling in the recesses on either side of the first gate structure to form raised source and drain regions;
• removing the dummy spacer and the hard masks;
• forming lightly doped regions on either side of the second gate structure;
• forming lightly doped regions on either side of the first gate structure;
• forming a liner oxide layer over the first and second semiconductor devices;
• forming a spacer on either side of the first gate structure and the second gate structure over the liner oxide layer;
• forming recesses on either side of the second gate structure in the substrate and outside of the spacer;
• forming deeper and more heavily doped source and drain regions in the substrate on either side of the second gate structure;
• forming deeper and more heavily doped source and drain regions in the substrate on either side of the first gate structure;
• forming contacts over the gate, source and drain regions of the first and second semiconductor devices;
• and
• forming an etch stop layer over the first and second semiconductor devices.

A method comprising:

• forming first and second gate structures of first and second semiconductor devices in a semiconductor substrate, the first and second gate structures being electrically isolated from one another, the first and second gate structures each having a hard mask;
• forming lightly doped regions on either side of the first gate structure and on either side of the second gate structure;
• forming a liner oxide layer over the first and second semiconductor devices;
• forming a nitride layer over the liner oxide layer;
• forming an oxide layer over the nitride layer;
• etching the oxide and nitride layers to form an offset spacer on either side of the first gate structure;
• forming a second oxide layer over the first and second semiconductor devices;
• etching the second oxide layer to form a spacer on either side of the first gate structure over the offset spacer;
• forming recesses on either side of the first gate structure and partially extending under the dummy spacer;
• filling in the recesses on either side of the first gate structure to form raised source and drain regions;
• etching the second oxide layer over the second semiconductor device and forming a spacer on either side of the second gate structure over the offset spacer thereof;
• forming deeper and more heavily doped source and drain regions in the substrate on either side of the second gate structure;
• removing the hard masks from the first and second gate structures;
• and
• forming deeper and more heavily doped source and drain regions in the substrate on either side of the first gate structure.

A method comprising:

• forming first and second gate structures of first and second semiconductor devices in a semiconductor substrate, the first and second gate structures being electrically isolated from one another, the first and second gate structures each having a hard mask and a pre-doped gate electrode;
• forming lightly doped regions on either side of the first gate structure and on either side of the second gate structure;
• forming an offset spacer on either side of the first gate structure;
• forming an oxide layer over the first and second semiconductor devices;
• etching the oxide layer to form a spacer on either side of the first gate structure over the offset spacer;
• forming recesses on either side of the first gate structure and partially extending under the dummy spacer;
• filling in the recesses on either side of the first gate structure to form raised source and drain regions;
• forming doped regions in the raised source and drain regions in-situ;
• etching the oxide layer over the second semiconductor device and forming a spacer on either side of the second gate structure over the offset spacer thereof;
• forming deeper and more heavily doped source and drain regions in the substrate on either side of the second gate structure;
• removing the hard masks from the first and second gate structures;
• and
• forming deeper and more heavily doped source and drain regions in the substrate on either side of the first gate structure.

A method comprising:

• forming first and second gate structures of first and second semiconductor devices in a semiconductor substrate, the first and second gate structures being electrically isolated from one another, the first and second gate structures each having a hard mask;
• forming lightly doped regions on either side of the first gate structure and on either side of the second gate structure;
• forming an offset spacer on either side of the first gate structure;
• forming an oxide layer over the first and second semiconductor devices;
• etching the oxide layer to form a dummy spacer on either side of the first gate structure over the offset spacer;
• forming recesses on either side of the first gate structure and partially extending under the dummy spacer;
• filling in the recesses on either side of the first gate structure to form raised source and drain regions;
• etching the oxide layer over the second semiconductor device and forming a dummy spacer on either side of the second gate structure over the offset spacer thereof;
• removing the hard mask from the second gate structure;
• forming deeper and more heavily doped source and drain regions in the substrate on either side of the second gate structure;
• removing the hard masks from the first gate structure;
• forming deeper and more heavily doped source and drain regions in the substrate on either side of the first gate structure;
• and
• removing the dummy spacers and the oxide layer over the first and second semiconductor devices.