US 7,611,041 B2 · Semiconductor device, manufacturing method and apparatus for the same

Abstract

A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.

Claims17

Dependent claims

A method for manufacturing a semiconductor device, comprising the steps of:

forming, on a wiring layer, an under-bump layer including first metal which is to form a first intermetallic compound at an interface through reaction with alloy solder;
supplying alloy solder having second metal different from main component metal added thereto;
and
forming an alloy layer at an interface between the under-bump layer and the alloy solder by temporary fusing the alloy solder before cooling, wherein the alloy layer is a combination of the first intermetallic compound and a second intermetallic compound of the main component metal of the alloy solder and the second metal.

1 more element

Dependencies are inferred from the claim text.

Facts

Application

11/847,687Filed 30 Aug 2007 · division

Priority

JP 2001-00597715 Jan 2001

Published

US 2007/0295786 A127 Dec 2007

Granted

3 Nov 2009

Term ends

Not estimatedThe source records don’t support an estimate.

Classification15 codes

B23K 3/0623
Solder feeding devices: for shaped solder piece feeding, e.g. preforms, bumps, balls, pellets, droplets
H10W 72/0112
Apparatus therefor: apparatus for manufacturing bump connectors
B23K 2101/40
Electric or electronic devices: semiconductor devices
H10W 72/012
Manufacture or treatment: of bump connectors, dummy bumps or thermal bumps

Family

Application10/043,225Parent of this division · filed 14 Jan 2002

Application11/144,753Parent of this division · filed 6 Jun 2005

US 6,969,915 B2Parent of this division · filed 29 Nov 2005

US 2007/0295786 A1Pre-grant publication · published 27 Dec 2007

US 7,282,432 B2Parent of this division

US 2002/0093096 A1Published application

US 2005/0279812 A1Published application

US 7,611,041 B2This patent

From the US filing history. Foreign family members aren’t listed.

Semiconductor device, manufacturing method and apparatus for the same

Life of this patent

Semiconductor device, manufacturing method and apparatus for the same

Life of this patent

Abstract

Claims17