Boundary scan connector test method capable of fully utilizing test I/O modules
AssigneeFunction Research Inc.
InventorsYu-Jen Huang, Chih-Hung Lin
Life of this patent
Estimating the term…
Abstract
Read the description file of a PCBA without determining and selecting connectors which might be relevant to boundary scan. The description file of the PCBA determines which pins of the connectors on the PCBA should correspond to the pins of a test I/O module. And use the wiring report generated by an auto test program generator to correspond the pins of the test I/O module to the pins of the connectors which are accessed by boundary scan. Thus the IC of the test I/O module would not have any unused pin between any two consecutive pins wired to the connectors of the PCBA.
Claims6
A boundary scan connector test method comprising:
- accessing a description file of a printed circuit board assembly (PCBA);
- setting a boundary scan integrated circuit (IC) on the PCBA to determine pins related to boundary scan on the PCBA;
- providing a connector on the PCBA to be electrically connected with a test input/output (I/O) module;
- executing an auto test program generator to generate a wiring report;
- and
- after pins on the test I/O module and pins of the connector on the PCBA are electrically connected according to the wiring report, performing a boundary scan for the PCBA through the test I/O module to check if the PCBA is normal.
A boundary scan connector test method comprising:
- accessing a description file of a printed circuit board assembly (PCBA);
- setting a boundary scan integrated circuit (IC) on the PCBA to determine pins related to boundary scan on the PCBA;
- providing connectors on the PCBA to be electrically connected with test input/output (I/O) modules of a Joint Test Action Group (JTAG) backplane;
- executing an auto test program generator to generate a wiring report and a hardware configuration report;
- a backplane controller of the JTAG backplane linking a plurality of test I/O modules on the JTAG backplane according to the hardware configuration report;
- and
- after pins on the linked test I/O modules and pins of the connectors on the PCBA are electrically connected according to the wiring report, performing a boundary scan for the PCBA through the linked test I/O modules to check if the PCBA is normal.
A boundary scan connector test method comprising:
- accessing a description file of a printed circuit board assembly (PCBA);
- setting a boundary scan integrated circuit (IC) on the PCBA to determine pins related to boundary scan on the PCBA;
- providing connectors on the PCBA to be electrically connected with test input/output (I/O) modules of Joint Test Action Group (JTAG) backplanes;
- executing an auto test program generator to generate a wiring report and a hardware configuration report;
- a Multiple Scan Path Linker linking a plurality of JTAG backplanes;
- backplane controllers of the linked JTAG backplanes linking a plurality of test I/O modules on the linked JTAG backplanes according to the hardware configuration report;
- and
- after pins on the linked test I/O modules and pins of the connectors on the PCBA are electrically connected according to the wiring report, performing a boundary scan for the PCBA through the linked test I/O modules to check if the PCBA is normal.
Dependencies are inferred from the claim text.