Configuring flash memory
AssigneeAtmel Corporation
InventorsMarc Laurent, Frode Milch Pedersen
Life of this patent
Estimating the term…
Abstract
A system for configuring or testing memory may cycle a memory array while substantially concurrently performing other functional testing. In particular implementations, the system may configure, or cycle, a flash memory using a serial interface and test other functional units using the same serial interface substantially concurrently with cycling the flash memory. In some implementations, cycling the flash memory includes erasing and writing to the flash memory in specific patterns in order to dissipate charge that may have accumulated during a fabrication process.
Claims19
A method comprising:
- receiving, from a serial interface, a first command to cycle an embedded memory of an integrated circuit;
- cycling the embedded memory with an embedded memory controller in response to receiving the first command;
- during the cycling of the embedded memory, receiving a second command from the serial interface to test at least one functional unit of the integrated circuit;
- and
- executing the second command to test the at least one functional unit while cycling of the embedded memory.
A method comprising:
- receiving via a serial interface a command to configure a flash memory;
- configuring a flash memory with an embedded flash memory controller;
- receiving test commands and test patterns via the serial interface, the test commands and test patterns configured to test a functional unit that is separate from the flash memory;
- and
- testing the functional unit while configuring the flash memory, the testing comprising executing the test commands and propagating the test patterns.
A method comprising:
- receiving, from a serial interface, a first command to cycle an embedded memory of an integrated circuit;
- cycling the embedded memory with an embedded memory controller in response to receiving the first command;
- during the cycling of the embedded memory, receiving a second command from the interface to test at least one functional unit of the integrated circuit;
- and
- executing the second command to test the at least one functional unit while cycling of the embedded memory.
Dependencies are inferred from the claim text.