Multiple mode content-addressable memory
AssigneeBroadcom Corporation
InventorMichael H. Lau
Life of this patent
Estimating the term…
Abstract
According to embodiments of the invention a multi-mode memory device is provided. The memory device includes at least one content-addressable memory (CAM). The memory device further includes a first match-in bus for receiving input into a first CAM of the at least one CAM, wherein the status of the match-in bus determines a operating mode of a plurality of operating modes of the first CAM, and a match-out bus for enabling the first CAM to be coupled to another CAM module and comprises match lines of a memory portion of the first CAM, wherein if the match-in bus is disabled, the first CAM is in a first mode, and if the match-in bus is enabled, the first CAM is in a second mode.
Claims19
A multi-mode memory device comprising:
- a first content-addressable memory (CAM);
- a first match-in bus for receiving input into the first CAM, wherein a status of the first match-in bus determines an operating mode of a plurality of operating modes of the first CAM;
- and
- a match-out bus for enabling the first CAM to be coupled to a second CAM, the match-out bus comprising match lines of a memory portion of the first CAM,
- wherein if the first match-in bus is disabled, the first CAM is in a first mode, and
- if the first match-in bus is enabled, the first CAM is in a second mode.
A multi-mode memory device comprising:
- a plurality of content addressable memories (CAMs) coupled together to form at least one logical CAM module, wherein each of the plurality of CAMs includes,
- a match-in bus for receiving input into a corresponding CAM, wherein a status of the match-in bus determines an operating mode of a plurality of operating modes of at least the corresponding CAM;
- and
- a match-out bus for enabling the corresponding CAM to be coupled to another one of the plurality of CAMs, the match-out bus comprising match lines of a memory portion of the corresponding CAM,
- wherein if the match-in bus is disabled, the corresponding CAM is in a first mode, and if the match-in bus is enabled, the corresponding CAM is in a second mode, and
- wherein contents of the logical CAM module are searchable in one clock cycle.
A multi-mode memory device in a network device, the multi-mode memory device comprising:
- at least one content-addressable memory (CAM);
- a match-in bus for receiving input into the CAM, wherein a status of the match-in bus determines an operating mode of a plurality of operating modes of the CAM;
- and
- a match-out bus for enabling the CAM to be coupled to another CAM, the match-out bus comprising match lines of a memory portion of the CAM,
- wherein if the match-in bus is disabled, the CAM is in a first mode, and
- if the match-in bus is enabled, the CAM is in a second mode.
A multi-mode memory device in a network device, the multi-mode memory device comprising:
- a plurality of content addressable memories (CAMs) coupled together to form at least one logical CAM module, wherein each of the plurality of CAMs includes,
- a match-in bus for receiving input into a corresponding CAM, wherein a status of the match-in bus determines an operating mode of a plurality of operating modes of the corresponding CAM, and
- a match-out bus for enabling the corresponding CAM to be coupled to another one of the plurality of CAMs, the match-out bus comprising match lines of a memory portion of the corresponding CAM,
- wherein if the match-in bus is disabled, the corresponding CAM is in a first mode, and if the match-in bus is enabled, the corresponding CAM is in a second mode, and
- wherein contents of the logical CAM module are searchable in one clock cycle.
A method of wide-entry data search, the method comprising:
- providing multiple content-addressable memories (CAMs);
- forming a logical CAM module using at least two of the CAMs;
- searching contents of a first CAM and determining if a match exists between field values and predetermined criteria in the first CAM, wherein the contents are searched in one clock cycle;
- and
- determining a match result and generating a match index value for the logical CAM module.
A method of wide-entry data search in a network device, the said method comprising:
- providing multiple content-addressable memories (CAMs);
- forming a logical CAM module using at least two of the CAMs;
- searching contents of a first CAM and determining if a match exists between field values and predetermined criteria in the first CAM, wherein the contents are searched in one clock cycle;
- and
- determining a match result and generating a match index value for the logical CAM module.
A method of providing wide-entry data search, the method comprising:
- forming a logical content-addressable memory (CAM) module in a network device, the forming including coupling together a plurality of content-addressable memories (CAMs);
- searching contents of the logical CAM module in one clock cycle;
- and
- determining a match result and generating a match index value for the logical CAM module.
A method of forming a multi-mode memory device, the method comprising:
- providing a first content addressable memory (CAM), wherein the first CAM includes a first match-in bus and a first match-out bus;
- providing a second CAM, wherein the second CAM includes a second match-in bus and a second match-out bus;
- coupling the first match-out bus with the second match-in bus;
- and
- enabling search of a total content of the first CAM and the second CAM in one memory cycle.
Dependencies are inferred from the claim text.