Semiconductor device having flash memory with a data length table
AssigneeNEC Electronics Corporation
InventorMasataka Nakano
Life of this patent
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Abstract
A semiconductor device includes a flash memory having a plurality of blocks; a controller configured to be accessible to the flash memory; and a data length table configured to store an identifier indicating a kind of each of a plurality of data and a data length of the data. A specific block as one of the plurality of blocks stores the plurality of data and identifiers for the plurality of data. The specific block may have a plurality of continuous sections, and each of the plurality of sections may store one of the plurality of data and one of the identifiers for the data.
Claims14
A semiconductor device, comprising:
- a flash memory having a plurality of blocks;
- a controller configured to be accessible to said flash memory;
- and
- a data length table configured to store an identifier that corresponds to a kind of data from a plurality of data, and a data length of said kind of data from the plurality of data,
- wherein a specific block from said plurality of blocks stores said plurality of data and the identifier that corresponds to the kind of data from the plurality of data,
- wherein the specific block comprises a plurality of sections,
- wherein, if a latest data of a specific kind should be read out, said controller sequentially traces said plurality of sections while holding or updating an address of an identifier that corresponds to a traced section as a target address,
- wherein said plurality of sections are continuous,
- wherein each of said plurality of sections stores said kind of data from the plurality of data and the identifier that corresponds to said kind of data from the plurality of data,
- wherein in each of said plurality of sections, said identifier that corresponds to said kind of data from the plurality of data is stored in a head address and said kind of data from the plurality of data is stored in a subsequent address region to said head address, wherein said controller finds out a free area in said specific block by sequentially tracing said identifier that corresponds to said kind of data from the plurality of data in each of said plurality of sections while referring to said data length table, and
- wherein the controller sequentially traces the plurality of sections if said identifier that corresponds to the traced section is coincident with an identifier for the specific kind, and reads out said latest data from the held or updated target address.
A method of using a flash memory as an EEPROM, comprising:
- finding out a free area in a specific one of a plurality of blocks, said specific block including a plurality of sections arranged continuously and said free area;
- forming a new section in said specific block by writing a new data in said new section;
- preparing a storage area for a target address if a latest data of a specific kind should be read out;
- reading an identifier in one of said plurality of sections;
- checking if said read identifier is coincident with an identifier of said specific kind;
- updating said target address based on an address of said read identifier if said read identifier is coincident with the identifier of said specific kind;
- referring to a data length table configured to store said identifier of said specific kind indicating a kind of data from a plurality of data to be stored in said specific block and a data length of said kind of data from the plurality of data, to determine an address of a next section based on an address of said identifier of said one section and said data length in said kind of data from the plurality of data in said specific block;
- repeating said reading, said updating and said referring from a head one of said plurality of sections to said free area;
- and
- reading the latest data based on the updated target address.
Dependencies are inferred from the claim text.