Queue depth management for communication between host and peripheral device
AssigneeSolarflare Communications, Inc.
InventorsSteve Pope, David Riddoch, Ching Yu, Derek Roberts
Life of this patent
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AssigneeSolarflare Communications, Inc.
InventorsSteve Pope, David Riddoch, Ching Yu, Derek Roberts
Estimating the term…
Method for managing a queue in host memory for use with a peripheral device. Roughly described, the host makes a determination of the availability of space in the queue for writing new entries, in dependence upon historical knowledge of the number of queue entries that the host has authorized the device to write, and the number of entries that the host has consumed. In dependence on that determination, the host authorizes the device to write a limited number of new entries into the queue. The device writes entries into the queue dependence upon the number authorized. The host maintains a read pointer into the queue but does not need to maintain a write pointer, and the peripheral device maintains a write pointer into the queue but does not need to maintain a read pointer.
A method for managing an information transfer queue in a memory of a host subsystem, for use with a peripheral device that can write into the queue via a communication channel, comprising steps of:
A method for managing a wrap-around information transfer queue in a memory of a host subsystem, for use with a peripheral device that can write into the information transfer queue via a communication channel, comprising steps of:
A method for managing an information transfer queue in a memory of a host subsystem, for use with a peripheral device that can write into the information transfer queue via a communication channel, comprising steps of:
A method for managing an information transfer queue in a memory of a host subsystem, for use by a peripheral device that can write into the information transfer queue via a communication channel, wherein the host subsystem includes a host centric read pointer accessible by the host subsystem for the information transfer queue, and the peripheral device includes a device centric write pointer accessible by the peripheral device for the information transfer queue, for use further with a second queue accessible to both the host subsystem and the peripheral device, the second queue having a number of entries present, comprising steps of:
Dependencies are inferred from the claim text.