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US 7,609,801 B2Granted
Counter circuit and method of operating the same
AssigneeHynix Semiconductor Inc.
InventorsJae-Boum Park, Young-Bo Shim
Life of this patent
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Abstract
A control unit that outputs a plurality of control signals in response to the input of a plurality of counter enable signals allocated into the numerical value of a multiple of 2 is provided. An operating unit increments or decrements by a multiple of 2 in response to input of the plurality of control signals and count up-down signals.
Claims6
A counter circuit, comprising:
- a control unit that outputs a plurality of control signals in response to input of a plurality of counter enable signals;
- and
- an operating unit that increments or decrements by 2 or more in response to the plurality of control signals and to count up-down signals,
- wherein the control unit includes;
- a first multiplexing unit configured to generate a first control signal using the counter enable signals by numeric values 1 and 2,
- a second multiplexing unit configured to generate a second control signal using the counter enable signals by numeric values 2 and 4,
- a third multiplexing unit configured to generate a first control signal using the counter enable signals by numeric values 4 and 8, and
- a fourth multiplexing unit configured to generate a first control signal using the counter enable signals by numeric values 8 and 1.
5 more elements
Dependencies are inferred from the claim text.