Calibrating a phase detector and analog-to-digital converter offset and gain
AssigneeSilicon Laboratories Inc.
InventorsAdam B. Eldredge, Jeffrey S. Batchelor, Gary Hammes
Life of this patent
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AssigneeSilicon Laboratories Inc.
InventorsAdam B. Eldredge, Jeffrey S. Batchelor, Gary Hammes
Estimating the term…
The present invention includes apparatus and methods to calibrate a phase detector and an analog-to-digital converter (ADC) offset and gain. In one such embodiment, an apparatus includes a phase detector to generate an error pulse and a reference pulse, a combiner to combine the pulses, and an ADC to receive the combined pulses, where the ADC has a full scale set by an average of the reference pulse. Still further, a calibration loop may be coupled between the output of the ADC and the phase detector to generate and provide a phase adjust signal to reduce or eliminate phase offsets. Other embodiments are described and claimed.
An apparatus comprising:
An apparatus comprising:
A system comprising:
An apparatus comprising:
Dependencies are inferred from the claim text.