Interpolation module, interpolator and methods capable of recovering timing in a timing recovery apparatus

An interpolation method capable of recovering timing in a timing recovery apparatus comprising:

• shifting phase of a digital input signal by 180 degrees to generate a first inverted signal that comprises a plurality of sampling values;
• interpolating the plurality of sampling values according to a fractional interval to generate an interpolated signal, which comprises a plurality of interpolants;
• shifting phase of the interpolated signal by 180 degrees to output a second inverted signal;
• utilizing a reference sampling clock to convert an analog input signal to the digital input signal;
• and
• outputting the fractional interval to perform interpolation according to the digital input signal and the second inverted signal;
• wherein one interpolate of the interpolated signal is shown below:
• y[k]=x[mk+2](αμk−αμ2k)+x[mk+1](−(α+1)μk+αμ2k)+x[mk](1+αμk+αμ2k)+x[mk−1](αμk−αμ2k)
• wherein k is a sample time, α is a predetermined positive fractional value, μk is the fraction interval corresponding to the sample time k, and mk is another sample time corresponding to the sample time k, y is the interpolated signal, x is the digital input signal.

A system comprising:

• a first symbol inverse unit for shifting phase of a digital input signal by 180degrees to generate a first inverted signal that comprises a plurality of sampling values;
• an interpolator coupled to the first symbol inverse unit for interpolating the plurality of sampling values according to a fractional interval to generate an interpolated signal, which comprises a plurality of interpolants;
• a second symbol inverse unit coupled to the interpolator for shifting phase of the interpolated signal by 180 degrees to output a second inverted signal;
• an analog-to-digital converter (ADC) coupled to the first symbol inverse unit for utilizing a reference sampling clock to convert an analog input signal to the digital input signal;
• a timing control module coupled to the second symbol inverse unit, the ADC, and the interpolator, for outputting the fractional interval to the interpolator according to the digital input signal and the second inverted signal;
• and
• an FFT module coupled to the second symbol inverse unit and the timing control module for demodulating the second inverted signal to generate a demodulated digital output signal to be sent to the timing control module;
• wherein the interpolator is a piecewise-parabolic interpolator outputting the plurality of interpolates, one interpolate is shown below:
• y[k]=x[mk+2](αμk−αμ2k)+x[mk+1](−(α+1)μk+αμ2k)+x[mk](1+αμk+αμ2k)+x[mk−1](αμk−αμ2k)
• wherein k is a sample time, α is a predetermined positive fractional value, μk is the fraction interval corresponding to the sample time k, and mk is another sample time corresponding to the sample time k, y is the interpolated signal, x is the digital input signal.