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US 7,609,723 B2Granted
Packet combining on PCI express
AssigneeIntel Corporation
InventorPeter R. Munguia
Life of this patent
Estimating the term…
Abstract
A method and device for combining packets is disclosed. In various embodiments, a plurality of packets that are compliant with a particular protocol are combined into a single packet of the same protocol. The single packet also preserves identification information for each of the combined packets within the single packet. The identification information can be used to partition and/or route the combined packets to their respective destinations.
Claims22
A method comprising:
- combining a plurality of packets that are compliant with a local computer-bus interconnect protocol into a single packet that is compliant with the same protocol;
- preserving identification information for each of the combined packets within the single packet;
- adding an indication to the single packet to indicate that the combined packets are contained within the single packet, wherein combining is performed during at least one of a time (i) prior to resynchronization of a Peripheral Component Interconnect (“PCI”) Express link, and (ii) during resynchronization of a PCI Express link;
- increasing efficiency of sending data in the plurality of packets or increasing the port utilization of a port used to send the plurality of packets;
- and
- delaying resynchronization by a PCI Express device of a PCI Express link based on at least one of a fixed amount of time and satisfying a minimum combined packet size threshold required for transmission on the link.
3 more elements
An apparatus comprising:
- a first Peripheral Component Interconnect (“PCI”) Express device
- combining a plurality of packets that are compliant with PCI Express into a single packet that is compliant with PCI Express, the single packet to contain identification information for each of the combined packets within the single packet and a header to indicate that the combined packets are contained within the single packet,
- sending the single packet over a PCI Express link;
- and
- intentionally delaying resynchronization of the link by delaying sending the single packet to save line power;
- reducing stuffing required to send the plurality of packets over the link;
- and
- a second PCI Express device to receive the single packet.
5 more elements
A system comprising:
- a graphics controller;
- a first Peripheral Component Interconnect (“PCI”) Express device coupled to the graphics controller, the first PCI Express device
- combining a plurality of packets that are compliant with PCI Express into a single packet that is compliant with PCI Express, the single packet to contain identification information for each of the combined packets within the single packet and a header to indicate that the combined packets are contained within the single packet,
- sending the single packet over a PCI Express link;
- and
- intentionally delaying resynchronization of the link by delaying sending the single packet to save line power;
- reducing stuffing required to send the plurality of packets over the link;
- and
- a second PCI Express device to receive the single packet.
6 more elements
A machine-readable medium containing instructions that, when executed by a machine, cause the machine to perform operations comprising:
- combining a plurality of packets that are compliant with a local computer-bus interconnect protocol into a single packet that is compliant with the same protocol;
- preserving identification information for each of the combined packets within the single packet;
- adding an indication to the single packet to indicate that the combined packets are contained within the single packet;
- delaying resynchronization of a Peripheral Component Interconnect Express link based on at least one of a fixed amount of time and satisfying a minimum combined packet size threshold required for transmission on the link;
- and
- saving power of the link by intentionally performing the delaying.
3 more elements
Dependencies are inferred from the claim text.