Semiconductor memory device
AssigneeHynix Semiconductor Inc.
InventorJae-Hyuk Im
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Abstract
A semiconductor memory device includes a charge pumping circuit, a level sensor, an oscillator, and a pumping control signal generator. The charge pumping circuit performs a negative-pumping operation to an external power in order to generate an internal voltage having a level lower than the external power. The level sensor senses a level of the internal voltage corresponding to a level of an adjusted reference voltage during a refresh mode. The oscillator generates a period signal in response to a sensing signal of the level sensor. The pumping control signal generator controls the operation of the charge pumping circuit in response to the period signal.
Claims9
A semiconductor memory device, comprising:
- a charge pumping circuit for negative-pumping an external power to generate an internal voltage with a level lower than the external power;
- a level sensor for receiving a self refresh signal and sensing a level of the internal voltage corresponding to a level of an adjusted reference voltage during a refresh mode;
- an oscillator for generating a period signal in response to a sensing signal of the level sensor;
- and
- a pumping control signal generator for controlling the operation of the charge pumping circuit in response to the period signal.
A driving method of a semiconductor memory device, comprising:
- performing negative-pumping operation to an external power in order to generate a bulk voltage of memory cell;
- sensing a level of the bulk voltage in response to an adjusted reference voltage;
- and
- controlling the negative-pumping operation so that the bulk voltage has a level corresponding to the adjusted reference voltage,
- wherein the adjusted reference voltage has a different voltage level for a self refresh mode than a level of the reference voltage for a normal mode.
Dependencies are inferred from the claim text.