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US 7,609,563 B2Granted
Simultaneous read circuit for multiple memory cells
AssigneeMicron Technology, Inc.
InventorsKristy A. Campbell, Terry L. Gilton
Life of this patent
Estimating the term…
Abstract
A memory device including a simultaneous read circuit design for multiple memory cells on a single interconnect using a fast fourier transform analysis circuit. The simultaneous read circuit can be used with any memory type storing information as an energy-absorbing state.
Claims20
A memory circuit, comprising:
- a plurality of multi-bit memory cells;
- a conductor line electrically connected to each of the plurality of multi-bit memory cells;
- and
- a fast fourier transform analysis circuit electrically connected to the conductor line configured to interpret data corresponding to at least one of the bits stored in each of the plurality of memory cells in response to a read signal applied to the conductor line.
1 more element
A memory circuit, comprising:
- a plurality of multi-bit memory cells, each comprising a first electrode and a second electrode electrically coupled to a host material incorporating at least two species of metal ions, the metal ions exhibiting zero field splitting resonance in response to an activation pulse, the host material and the metal ions being configured to store multiple bits of data as a plurality of energy-absorbing states and non-energy-absorbing states;
- a conductor line electrically connected to each of the plurality of memory cells;
- and
- a fast fourier transform analysis circuit electrically connected to the conductor line and configured to interpret data corresponding to one of the bits stored in each of the plurality of memory cells in response to a read signal applied to the conductor line.
1 more element
A method of simultaneously reading a plurality of multi-bit memory cells, comprising:
- providing a plurality of multi-bit memory cells, each being programmable to a plurality of energy-absorbing states and non-energy-absorbing states;
- programming at least one of the plurality of multi-bit memory cells to at least one of the plurality of energy-absorbing states;
- and
- simultaneously reading one of the bits stored in each of the plurality of multi-bit memory cells by sensing the absorption or transmission of a read energy pulse through each of the plurality of memory cells.
1 more element
Dependencies are inferred from the claim text.