Central processor integrated circuitry for a print controller of a pagewidth printhead

Abstract

A central processor integrated circuit for a printer controller of a pagewidth inkjet printer includes a bus. Host interface circuitry is connected to the bus and is configured to receive compressed page data having a bi-level black layer and a contone color layer and to communicate the compressed page data to the bus. Black layer expansion circuitry is connected to the bus and is configured to receive and expand the bi-level black layer. Color layer expansion circuitry is connected to the bus and is configured to receive and expand the contone layer. Halftoner and compositor circuitry is connected to the bus and is configured to receive expanded bi-level black layer data and expanded contone layer data and to composite the bi-level black layer over the contone layer. Processor circuitry is connected to the bus and is programmed to control operation of components of the central processor integrated circuit. DMA controller circuitry is connected to the bus and is configured to be programmed by the processor circuitry to generate addresses for data transfer between the components. Printhead interface circuitry is connected to the bus to facilitate communication between the bus and a pagewidth printhead.

Dependencies are inferred from the claim text.