Filterless class-D speaker driver with less switching

A class D electronic amplifier comprising:

• (a) a feedback loop stage, comprising an outer feedback loop stage that provides a first integrator output signal in accordance with an amplifier input signal and a scaled version of a feedback signal, and an inner feedback loop stage that provides a comparator input signal including a second integrator output signal and a negated second integrator output signal in accordance with the first integrator output signal and the scaled feedback signal, wherein the scaled feedback signal is provided by a feedback gain block having the feedback signal as an input;
• (b) a comparator stage which provides a comparator output signal in accordance with the comparator input signal and a comparator logic, the comparator logic adds the comparator input signal to a comparative signal to produce a sum signal, the sum signal is compared to a peak voltage;
• and
• (c) a low pass filter stage which provides an amplifier output signal, which is used as the feedback signal, in accordance with the comparator output signal.

A class D amplifier method to amplify signals, comprising:

• (1) generating a comparator input signal in accordance with an amplifier input signal and a feedback signal;
• (2) generating a comparator output signal in accordance with the comparator input signal, a peak voltage, and a comparative signal;
• and
• (3) generating an amplifier output signal and the feedback signal in accordance with the comparator output signal,
• wherein the comparator output signal comprises a first comparator output signal and a second comparator output signal,
• wherein the first comparator output signal and the second comparator output signal both cannot have a maximum absolute value in the same half cycle between zero crossings, and
• wherein the amplifier output signal and the feedback signal are generated in accordance with the first comparator output signal and the second comparator output signal.

A class D electronic amplifier comprising:

• a feedback gain block that outputs a scaled feedback signal in response to an input feedback signal;
• an outer feedback loop stage that provides a first integrator output signal in response to a difference between an amplifier input signal and the scaled feedback signal;
• an inner feedback loop stage that provides a second integrator output signal and a negated second integrator output signal in response to a difference between the first integrator output signal and the scaled feedback signal;
• a first comparator stage that provides a first comparator output signal in response to the second integrator output signal, wherein a maximum voltage level is provided on the first comparator output signal when the sum of the second integrator output signal and a comparative signal exceeds a peak voltage, and a minimum voltage level is provided on the first comparator output signal when the peak voltage exceeds the sum of the second integrator output signal and the comparative signal;
• a second comparator stage that provides a second comparator output signal in response to the negated second integrator output signal, wherein a maximum negative voltage level is provided on the second comparator output signal when the sum of the negated second integrator output signal and the comparative signal exceeds a peak voltage, and a minimum negative voltage level is provided on the second comparator output signal when the peak voltage exceeds the sum of the negated second integrator output signal and the comparative signal;
• and
• a low pass filter stage that provides an amplifier output signal, which is used as the feedback signal, in response to the first comparator output signal and the second comparator output signal.