Nonvolatile semiconductor memory with dummy cell which is absence of a source/drain region
AssigneeKabushiki Kaisha Toshiba
InventorsShigeru Ishibashi, Mitsuhiro Noguchi
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Abstract
A nonvolatile semiconductor memory according to the present invention includes a memory cell transistor which is disposed in a first region and which has a gate electrode of a stacked structure, and a dummy cell which is disposed in a second region neighboring the first region and which has a gate electrode having the same structure as that of the gate electrode of the memory cell transistor. The memory cell transistor and dummy cell are connected to the same word line. The memory cell transistor has a diffusion layer serving as the source/drain region thereof, while the dummy cell does not have the diffusion layer serving as the source/drain region thereof.
Claims20
A nonvolatile semiconductor memory comprising:
- a memory cell transistor which is disposed in a first region and which has a gate electrode of a stacked structure;
- and
- a dummy cell which is disposed in a second region neighboring the first region and which has a gate electrode having the same structure as that of the gate electrode of the memory cell transistor, wherein
- the second region is not connected to a contact but electrically in a floating state,
- the memory cell transistor and dummy cell are connected to the same word line, and
- the memory cell transistor has a diffusion layer serving as the source/drain region thereof, while the dummy cell does not have the diffusion layer serving as the source/drain region thereof.
A nonvolatile semiconductor memory comprising:
- a memory cell transistor which is disposed in a first region and which has a gate electrode of a stacked structure;
- and
- a dummy cell which is disposed in a second region neighboring the first region and which has a gate electrode having the same structure as that of the gate electrode of the memory cell transistor, wherein
- the second region is not connected to a contact but electrically in a floating state,
- the size of the second region in the word line extending direction is larger than the size of the first region in the word line extending direction, and
- the memory cell transistor has a diffusion layer serving as the source/drain region thereof, while the dummy cell does not have the diffusion layer serving as the source/drain region thereof.
A nonvolatile semiconductor memory comprising:
- a plurality of memory cell transistor which is disposed on an active area extending a first direction in a first region and which has a gate electrode of a stacked structure;
- and
- a plurality of dummy cell which is disposed on an active area in a second region neighboring the first region and which has a gate electrode having the same structure as that of the gate electrode of the memory cell transistor, wherein
- the second region is not connected to a contact but electrically in a floating state,
- a size of the dummy cell in a second direction perpendicular to the first direction is larger than a size of the memory cell transistor in the second direction, and
- each of the memory cell transistors has a diffusion layer serving as the source/drain region thereof, while each of the dummy cells does not have the diffusion layer serving as the source/drain region thereof.
Dependencies are inferred from the claim text.