Multiple-gate MOS transistor using Si substrate and method of manufacturing the same
AssigneeElectronics and Telecommunications Research Institute
InventorsYoung Kyun Cho, Tae Moon Roh, Jong Dae Kim
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AssigneeElectronics and Telecommunications Research Institute
InventorsYoung Kyun Cho, Tae Moon Roh, Jong Dae Kim
Estimating the term…
Provided are a multiple-gate MOS (metal oxide semiconductor) transistor and a method of manufacturing the same. The transistor includes a single crystalline active region having a channel region having an upper portion of a streamlined shape (∩) obtained by patterning an upper portion of a bulk silicon substrate with an embossed pattern, and having a thicker and wider area than the channel region; a nitride layer formed at both side surfaces of the single crystalline active region to expose an upper portion of the single crystalline active region at a predetermined height; and a gate electrode formed to be overlaid with the exposed upper portion of the single crystalline active region of the channel region.
A method of manufacturing a multiple-gate metal oxide semiconductor (MOS) transistor, the method comprising:
Dependencies are inferred from the claim text.