Methods of forming MOSFETS using crystalline sacrificial structures
AssigneeSamsung Electronics Co., Ltd.
InventorsMin-sang Kim, Chang-woo Oh, Dong-won Kim, Kyoung-hwan Yeo, Sung-min Kim
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Abstract
A Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) can be formed by growing an epitaxial semiconductor layer on an upper surface of a sacrificial crystalline structure and on a substrate to form a buried sacrificial structure. The buried sacrificial structure can be removed to form a void in place of the buried sacrificial structure and a device isolation layer can be formed in the void.
Claims15
A method of forming a Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) comprising:
- forming a recess in an upper surface of a substrate;
- forming a sacrificial crystalline structure filling the recess;
- growing an epitaxial semiconductor layer on an upper surface of the sacrificial crystalline structure and on the substrate to form a buried sacrificial structure;
- removing the buried sacrificial structure to form a void in place of the buried sacrificial structure;
- and
- forming a device isolation layer in the void, wherein the epitaxial semiconductor layer and the substrate contact each other around the void to suppress a floating body effect and an upper surface of the buried sacrificial structure is above a lower surface of source/drain regions formed in the substrate.
A method of forming a MOSFET, comprising:
- forming a first recess in a region of a semiconductor substrate having a crystalline structure;
- forming a sacrificial structure having the crystalline structure in the recess;
- forming an epitaxial semiconductor layer on the sacrificial structure and on the semiconductor substrate;
- patterning the epitaxial semiconductor layer and the semiconductor substrate to form a second recess to expose a lateral sidewall surface of the sacrificial structure;
- removing the sacrificial structure via the exposed lateral sidewall surface to form a void in the substrate in place of the sacrificial structure;
- and
- forming a device isolation layer in the void.
A method of forming a MOSFET comprising:
- forming a first mask pattern in a predetermined region of a semiconductor substrate having a crystalline structure;
- forming a first recess in the semiconductor substrate using the first mask pattern as an etch mask;
- epitaxially growing a crystalline sacrificial structure in the first recess using the first mask pattern to prevent epitaxial growth beneath the first mask pattern;
- removing the first mask pattern to expose an upper surface of the semiconductor substrate;
- epitaxially growing a semiconductor layer on an upper surface of the sacrificial structure and the semiconductor substrate;
- patterning the epitaxial semiconductor layer and the semiconductor substrate to form a second trench exposing a lateral surface of the sacrificial structure;
- removing the exposed sacrificial structure to form a void in the first recess;
- forming a device isolation layer in the void;
- forming a gate insulation layer on the epitaxial semiconductor layer;
- forming a gate pattern on the gate insulation layer to cross over a central portion of the epitaxial semiconductor layer;
- and
- forming source/drain regions in the epitaxial semiconductor layer on both sides of the gate pattern.
A method of forming a Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) comprising:
- forming a recess in an upper surface of a substrate;
- forming a sacrificial crystalline structure filling the recess;
- growing an epitaxial semiconductor layer on an upper surface of the sacrificial crystalline structure and on the substrate to form a buried sacrificial structure including in the recess wherein an upper surface of the buried sacrificial structure is above a lower surface of source/drain regions formed in the substrate;
- removing the buried sacrificial structure to form a void in place of the buried sacrificial structure;
- and
- forming a device isolation layer in the void, wherein forming a device isolation layer in the void comprises:
- forming the device isolation layer adjacent to a source region and/or a drain region;
- and
- avoiding forming the device isolation layer beneath a central portion of a channel region in the MOSFET.
Dependencies are inferred from the claim text.