Back to results
US 7,547,973 B2Granted
Tamper-resistant semiconductor device
AssigneePanasonic Corporation
InventorNoriaki Matsuno
Life of this patent
Estimating the term…
Abstract
The semiconductor device of the present invention includes: first defensive wiring provided above a diffusion isolation layer formed in a substrate or a well, arranged at a minimum wiring pitch allowable in fabrication to cover the diffusion isolation layer; a plurality of signal wiring layers formed above the first defensive wiring; and means for applying a predetermined signal to the first defensive wiring and capturing a change in an electrical or physical property of the first defensive wiring.
Claims13
A semiconductor device comprising:
- one unit or a plurality of units of first defensive wiring provided above a diffusion isolation layer formed in a substrate or a well;
- a plurality of signal wiring layers formed above the first defensive wiring;
- means for applying a predetermined signal to the first defensive wiring, monitoring an electrical or physical property of the defensive wiring, capturing a change in the electrical or physical property of the first defensive wiring, and outputting a control signal in response to said change for preventing fraudulent analysis and information tampering of the semiconductor device;
- one unit or a plurality of units of second defensive wiring provided above the plurality of signal wiring layers;
- and
- means for applying a predetermined signal to the second defensive wiring and capturing a change in an electrical or physical property of the second defensive wiring,
- wherein the first defensive wiring is formed in the lowermost metal wiring layer.
4 more elements
A semiconductor device comprising:
- transistor elements formed in a substrate or a well;
- one unit or a plurality of units of first defensive wiring provided above a diffusion isolation layer formed in the substrate or the well;
- a plurality of signal wiring layers formed above the first defensive wiring;
- and
- means for applying a predetermined signal to the first defensive wiring, monitoring an electrical or physical property of the defensive wiring, capturing a change in the electrical or physical property of the first defensive wiring, and outputting a control signal in response to said change for preventing fraudulent analysis and information tampering of the semiconductor device,
- wherein the first defensive wiring is formed in the lowermost metal wiring layer so as not to overlap the transistor element.
3 more elements
Dependencies are inferred from the claim text.