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US 7,479,423 B2Granted
Semiconductor device and manufacturing method of semiconductor device
AssigneeKabushiki Kaisha Toshiba
InventorsAtsushi Yagishita, Tomohiro Saito
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Abstract
Dummy gate patterns 111, 112 are formed on a silicon active layer 103 of an SOI substrate, and thereafter, these dummy gate patterns 111, 112 are removed to form gate grooves 130, 132. A threshold voltage of each transistor is adjusted by etching a silicon active layer 103 in any one of these gate grooves 130, 132 to reduce a thickness of a portion constituting a channel region. This enables the enhancement of freedom degree and so on in circuit designing according to conditions.
Claims2
A manufacturing method of a semiconductor device, comprising:
- forming a first and a second dummy gate pattern on a silicon layer formed over a semiconductor substrate via an insulation film;
- forming impurity diffusion layers at positions of source regions and drain regions by introducing impurities into said silicon layer, using said first and said second dummy gate pattern as masks;
- forming an insulation film over said silicon layer so as to bury said first and said second dummy gate pattern;
- removing said first dummy gate pattern to form a first groove in said insulation film;
- forming a silicon oxide film at a position of a channel region of said silicon layer in said first groove;
- removing said silicon oxide film to reduce a thickness of a portion corresponding to the channel region of said silicon layer;
- removing said second dummy gate pattern to form a second groove in said insulation film;
- forming gate insulation films over the channel regions of said silicon layer;
- and
- forming gate electrodes over said gate insulation films.
7 more elements
Dependencies are inferred from the claim text.