DC offset cancellation circuits and methods

A wireless receiver comprising:

• a mixer having a first input, a second input and an output, wherein the first input is coupled to a first amplifier to receive an amplified RF signal and the second input is coupled to a frequency synthesizer to receive a first signal having one of a plurality of frequencies;
• and
• a plurality of parallel DC offset cancellation stages selectively coupled to the mixer output,
• wherein if the first signal has a first frequency, then a first one of the plurality of parallel DC offset cancellation stages is coupled to the mixer output, and if the first signal has a second frequency, then a second one of the plurality of parallel DC offset cancellation stages is coupled to the mixer output,
• wherein each of the plurality of DC offset cancellation stages includes a first resistor coupled to a reference voltage through a switch.

A wireless receiver comprising:

• a mixer having a first input, a second input and an output, wherein the first input is coupled to a first amplifier to receive an amplified RF signal and the second input is coupled to a frequency synthesizer to receive a first signal having one of a plurality of frequencies;
• and
• a plurality of parallel DC offset cancellation stages selectively coupled to the mixer output,
• wherein if the first signal has a first frequency, then a first one of the plurality of parallel DC offset cancellation stages is coupled to the mixer output, and if the first signal has a second frequency, then a second one of the plurality of parallel DC offset cancellation stages is coupled to the mixer output,
• wherein each of the plurality of DC offset cancellation stages includes a variable attenuator.

A wireless receiver comprising:

• a mixer having a first input, a second input and an output, wherein the first input is coupled to a first amplifier to receive an amplified RF signal and the second input is coupled to a frequency synthesizer to receive a first signal having one of a plurality of frequencies;
• a plurality of parallel DC offset cancellation stages selectively coupled to the mixer output;
• a second amplifier having an input coupled to an output of each of the plurality of parallel DC offset cancellation stages;
• and
• a third DC offset cancellation stage coupled to an output of the second amplifier,
• wherein if the first signal has a first frequency, then a first one of the plurality of parallel DC offset cancellation stages is coupled to the mixer output, and if the first signal has a second frequency, then a second one of the plurality of parallel DC offset cancellation stages is coupled to the mixer output,
• wherein, in a first state, the third DC offset cancellation stage has a first low cutoff frequency and, in a second state, the third DC offset cancellation stage has a second low cutoff frequency less than the first low cutoff frequency.

A wireless receiver including a DC offset cancellation circuit, the DC offset cancellation circuit comprising:

• a capacitor having a first terminal coupled to receive an input signal and a second terminal;
• a first MOS transistor having a first terminal and a second terminal, the first terminal of the MOS transistor being coupled to the second terminal of the capacitor;
• and
• a resistance coupled between the second terminal of the first MOS transistor and a reference voltage,
• wherein, in a first state, the resistance has a first value so that the circuit has a first low cutoff frequency, and in a second state, the resistance has a second value so that the circuit has a second low cutoff frequency less than the first low cutoff frequency.