Method and system for programming a DMA controller in a system on a chip, with the DMA controller having source, destination, and size registers

A system on a chip comprising:

• a direct memory access (DMA) controller coupled to an address bus and a data bus, the DMA controller including a set of registers comprising a source register, a destination register, and a size register;
• a plurality of entities coupled to the address bus and the data bus, each of the entities being identified by a physical address and being addressable by applying that physical address to the address bus;
• a central processing unit capable of executing a user program, the user program including a first dedicated instruction that is dedicated to programming the registers of the DMA controller and includes an address argument indicating a virtual address;
• at least one dedicated control signal wire coupling the central processing unit to the DMA controller and to each of the entities, the at least one dedicated control signal wire being dedicated to delivering a DMA Programming control signal from the central processing unit to the DMA controller and to the entities;
• and
• a memory management unit for translating virtual addresses into corresponding physical addresses according to a translation table,
• wherein in response to receiving the first dedicated instruction:
• the central processing unit supplies the virtual address indicated by the address argument of the first dedicated instruction to the memory management unit,
• the memory management unit translates the virtual address into a corresponding physical address,
• the memory management unit supplies the corresponding physical address to the address bus,
• the central processing unit delivers, via the at least one dedicated control signal wire, the DMA programming control signal at a first value to the DMA controller and at a second value, which is different than the first value, to the entities, and
• when the DMA controller receives the DMA programming control signal at the first value from the central processing unit via the at least one dedicated control signal wire, the DMA controller stores the corresponding physical address that is supplied from the memory management unit to the address bus in the source register or the destination register.

A system on a chip comprising:

• an address bus;
• a data bus;
• a direct memory access (DMA) controller coupled to the address bus and the data bus, the DMA controller including a set of registers comprising a source register, a destination register, and a size register;
• a plurality of entities coupled to the address bus and the data bus, each of the entities being identified by a physical address and being addressable by applying that physical address to the address bus;
• a central processing unit capable of executing a user program, the central processing unit being coupled to the DMA controller and the entities, and the user program including a first dedicated instruction that is dedicated to programming the registers of the DMA controller and includes an address argument indicating a virtual address;
• and
• first means for, in response to the first dedicated instruction of the user program translating the virtual address indicated by the address argument of the first dedicated instruction into a corresponding physical address, applying the corresponding physical address to the address bus, delivering a DMA programming control signal at a first value to the DMA controller and at a second value, which is different than the first value, to the entities,
• wherein in response to receiving the DMA programming control signal at the first value, the DMA controller stores the corresponding physical address that is applied to the address bus in the source register or the destination register.