Rational number frequency multiplier circuit and method for generated rational number frequency

A rational number frequency multiplier circuit, for receiving a plurality of input signals, and outputting at least a multiple frequency signal, wherein the input signals have a first frequency with different phases;

• the rational number frequency multiplier circuit comprising:
• a frequency divider module, for receiving the input signals, dividing the frequency of the input signals, and outputting a plurality of frequency-divided signals;
• a first phase synthesis module, coupled to the frequency divider module, for synthesizing the frequency-divided signals into a plurality of first pulse period signals;
• a second phase synthesis module, for receiving the input signals, and synthesizing the input signals into a plurality of second pulse period signals;
• an adder, coupled to the first phase synthesis module and the second phase synthesis module, wherein
• according to a desired multiplication of frequency, the corresponding first pulse period signals and the second pulse period signals are added, for synthesizing and outputting the multiple frequency signals.