Method and apparatus for filtering output data
AssigneeMicron Technology, Inc.
InventorsTommaso Vali, Giovanni Santin, Michele Incarnati
Life of this patent
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Abstract
Apparatus and methods for filtering spurious output transitions with an adaptive filtering circuit which tracks the memory architecture and form factors with a reduced speed penalty. The filtering is selectable by a fuse option.
Claims21
A method of filtering output transitions in a memory, comprising:
- propagating a latch signal to enable an output latch in a memory along a path matched to a data path along which valid data is sent to the output latch;
- and
- enabling the output latch when the valid data and the latch signal arrive at the output latch.
A method of operating a memory, comprising:
- selecting one of a first data output configuration in which output data is unfiltered, and a second data output configuration in which output data is filtered;
- and
- providing unfiltered data when the first data output configuration is selected, and providing filtered data when the second data output configuration is selected.
A method of propagating data from an array of memory cells to an output buffer in a memory, comprising:
- providing a data path circuit between the array of memory cells and the output buffer, the data path circuit having a first branch for propagating data and a second branch for propagating a data latch signal;
- propagating the data from the array of memory cells to a data output latch on the first branch;
- propagating the data latch signal from the array of memory cells on the second branch to the data output latch, the second branch identical to the first branch, wherein the data and the data latch signal arrive at the data output latch at the same time.
A method of providing output from a memory, comprising:
- providing a data path along which data is read from the array to an output, the data path having a first data path driver and a data path latch;
- and
- providing a matched path parallel to the data path, the matched path having a first configuration with a filtered output path, and a second configuration with a non-filtered output path.
A method of providing data output from a memory, comprising:
- providing a circuit with a first branch to propagate data to a data output latch and a second identical branch to propagate a data latch enable signal to the data output latch;
- propagating the data and the data latch enable signal through the first and second branches;
- and
- enabling valid data output from the data latch when the data latch enable signal and the data arrive at the data output latch.
A method of configuring a dual configuration memory, comprising:
- programming a fuse with a filter enable signal that selects either a filtered data output configuration or an unfiltered data output configuration;
- propagating valid data through a first path in a data path circuit to an output latch;
- propagating a latch enable signal through a second path in the data path circuit to the output latch, the second data path identical to the first data path;
- opening the data output latch immediately when an unfiltered data output configuration signal is selected;
- and
- opening the data output latch simultaneously with the arrival of valid data at the output latch when a filtered data output configuration signal is selected.
A method of filtering output transitions in a memory, comprising:
- providing an adaptive filtering circuit selectable by a fuse setting;
- enabling a filtered output configuration when the fuse is enabled;
- and
- providing filtered output at the same time the filtered output arrives at an output.
A method of operating a memory, comprising:
- using a sense amplifier latch enable signal to identify a time when data are valid at a sense amplifier output;
- propagating data to an output buffer through a first data path;
- propagating the sense amplifier enable signal through a second data path identical to the first data path;
- and
- enabling data output from the first data path when the data and the sense amplifier enable signal arrive at the output buffer.
A method of operating a memory, comprising:
- providing identical first and second data paths between a memory core and an output buffer;
- enabling a first pass through buffer configuration for memory operation at a first speed or a second filtered buffer configuration for memory operation at a second speed lower than the first speed dependent upon receipt of valid data at a data latch connected to the first and second paths.
A method of operating a memory, comprising:
- sending data at a received address to a first data path;
- propagating a signal through a second path matched identically with the first data path;
- enabling a data latch to latch the data when the signal has propagated through the matched path.
Dependencies are inferred from the claim text.