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US 7,466,182 B2Granted
Level shift circuit
AssigneeRealtek Semiconductor Corp.
InventorTze-Chien Wang
Life of this patent
Estimating the term…
Abstract
In many high voltage circuits, it often needs to shift the logic voltage level to keep the circuit normal operation. In the class-D amplifier circuitry, it needs to shift the voltage level of pulse width modulation (PWM) signal to control the connecting of different power switches. In other applications, such as a driver to drive amplifier of an audio device, it also needs a level shift circuit to maintain the circuitry in normal voltage operation. Therefore, this invention is to provide a novel level shift circuit with high performance, low cost and low power dissipation characteristics.
Claims18
A level shift circuit, comprising:
- a first voltage level transfer unit, for transferring the voltage level of a first input signal from a first voltage level to a second voltage level and outputting a first level transferred control signal;
- a second voltage level transfer unit, for transferring the voltage level of a second input signal from the first voltage level to the second voltage level and outputting a second level transferred control signal;
- and
- a control block circuit coupled to the first voltage level transfer unit and the second voltage level transfer unit, for outputting an output signal according to the first level transferred control signal and the second level transferred control signal;
- wherein the first input signal and the second input signal are inversed;
- and
- the first voltage level transfer unit comprises:
- a first NMOS transistor having a source, a drain and a gate, the source of the first NMOS transistor being coupled to the first supply voltage with first voltage level, the gate of the first NMOS transistor being used to receive the first input signal;
- and
- a first PMOS transistor having a source, a drain and a gate, the drain of the first PMOS transistor being coupled to the drain of said first NMOS transistor, the gate of the first PMOS transistor being coupled to the second supply voltage with second voltage level, the source of the first PMOS transistor being used to output the first level transferred control signal and coupled to the control block circuit.
7 more elements
A level shift circuit, comprising:
- a first voltage level transfer unit, for transferring the voltage level of a first input signal from a first voltage level to a second voltage level and outputting a first level transferred control signal;
- a second voltage level transfer unit, for transferring the voltage level of a second input signal from the first voltage level to the second voltage level and outputting a second level transferred control signal;
- and
- a control block circuit coupled to the first voltage level transfer unit and the second voltage level transfer unit, for outputting an output signal according to the first level transferred control signal and the second level transferred control signal;
- wherein the first input signal and the second input signal are inversed;
- and
- the first voltage level transfer unit comprises:
- a first PMOS transistor having a source, a drain and a gate, the source of the first PMOS transistor being coupled to the first supply voltage with first voltage level, the gate of the first PMOS transistor being used to receive the first input signal;
- and
- a first NMOS transistor having a source, a drain and a gate, the drain of the first NMOS transistor being coupled to the drain of said first PMOS transistor, the gate of the first NMOS transistor being coupled to the second supply voltage with second voltage level, the source of the first NMOS transistor being used to output the first level transferred control signal and coupled to the control block circuit.
7 more elements
A level shift circuit, comprising:
- a first voltage level transfer unit, for transferring the voltage level of a first input signal from a first voltage level to a second voltage level and outputting a first level transferred control signal;
- a second voltage level transfer unit, for transferring the voltage level of a second input signal from the first voltage level to the second voltage level and outputting a second level transferred control signal;
- and
- a control block circuit coupled to the first voltage level transfer unit and the second voltage level transfer unit, for outputting an output signal according to the first level transferred control signal and the second level transferred control signal;
- wherein the first voltage level transfer unit comprises:
- a first transistor having a source, a drain and a gate, the source of the first transistor being coupled to the first supply voltage with first voltage level, the gate of the first transistor being used to receive the first input signal;
- and
- a second transistor having a source, a drain and a gate, the drain of the second transistor being coupled to the drain of said first transistor, the gate of the second transistor being coupled to the second supply voltage with second voltage level, the source of the second transistor being used to output the first level transferred control signal and coupled to the control block circuit;
- and
- the second voltage level transfer unit comprises:
- a third transistor having a source, a drain and a gate, the source of the third transistor being coupled to the first supply voltage with the first voltage level, the gate of the third transistor being used to receive the second input signal;
- and
- a fourth transistor having a source, a drain and a gate, the drain of the fourth transistor being coupled to the drain of the third transistor, the gate of the fourth transistor being coupled to the second supply voltage with second voltage level, the source of the fourth transistor being used to output the second level transferred control signal and coupled to the control block circuit.
10 more elements
Dependencies are inferred from the claim text.