Semiconductor contact structure

A semiconductor device structure for a three-dimensional integrated circuit, comprising:

• a substrate having a first surface and a second surface;
• a via defined in the substrate and extending from the first surface to the second surface;
• and
• a plurality of contact structures on the first surface contacting the via, a cross section of each of the plurality of contact structures parallel to the first surface having a first side and a second side;
• wherein a ratio of the longer side to the shorter side of the first side and the second side is more than about 2:1, and a ratio of an area of the plurality of contact structures to an area of the via parallel to the first surface is more than 25%.

A multi-chip semiconductor structure, comprising:

• a first chip;
• and
• a second chip attaching to the first chip;
• wherein the first chip comprises:
• a first substrate having a first surface and a second surface;
• a first via defined in the first substrate and extending from the first surface to the second surface;
• and
• a first plurality of contact structures on the first surface contacting the first via, wherein a cross section of each of the first plurality of contact structures parallel to the first surface has a first side and a second side and a ratio of the longer side to the shorter side of the first side and the second side is more than about 2:1.