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US 7,465,984 B2Granted
Nonvolatile memory element
AssigneeKabushiki Kaisha Toshiba
InventorKenji Sawamura
Life of this patent
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Abstract
A nonvolatile memory element includes a laminated gate provided above a semiconductor substrate with a tunnel insulating film disposed therebetween and having a floating gate electrode, a gate-gate insulating film and a control gate electrode sequentially stacked. The gate-gate insulating film includes a first silicon oxide film, a first aluminum oxide film having hafnium added thereto, a second aluminum oxide film, a third aluminum oxide film having hafnium added thereto and a second silicon oxide film sequentially stacked.
Claims18
A nonvolatile memory element comprising:
- a laminated gate provided above a semiconductor substrate with a tunnel insulating film disposed therebetween and having a floating gate electrode, a gate-gate insulating film and a control gate electrode sequentially stacked,
- wherein the gate-gate insulating film includes a first silicon oxide film, a first aluminum oxide film having hafnium added thereto, a second aluminum oxide film, a third aluminum oxide film having hafnium added thereto and a second silicon oxide film sequentially stacked.
A nonvolatile memory element comprising:
- a laminated gate provided above a semiconductor substrate with a tunnel insulating film disposed therebetween and having a floating gate electrode, a gate-gate insulating film and a control gate electrode sequentially stacked,
- wherein the gate-gate insulating film includes a first silicon nitride film, a first aluminum oxide film having hafnium added thereto, a second aluminum oxide film, a third aluminum oxide film having hafnium added thereto and a second silicon nitride film sequentially stacked.
Dependencies are inferred from the claim text.