Method for manufacturing semiconductor device

A method for manufacturing a semiconductor device, comprising:

• a first step for forming first and second gate trenches in a semiconductor substrate;
• a second step for forming a gate insulation film on inner wall surfaces of the first and second gate trenches;
• a third step for filling a gate electrode material into at least the first and second gate trenches;
• a fourth step for forming a mask that has an opening for exposing an area between a region where the first gate trench is formed and a region where the second gate trench is formed;
• a fifth step for selectively forming a punch-through stopper region by ion implantation of a first conductive impurity into the semiconductor substrate under the opening using the mask;
• a sixth step for selectively forming a first source/drain region that is shallower than the punch-through stopper region by ion implantation of a second conductive impurity into the semiconductor substrate under the opening using the mask;
• a seventh step for forming a gate electrode by pattering the gate electrode material;
• and
• an eighth step for selectively forming a second source/drain region by ion implantation of the second conductive impurity which has a lower impurity concentration than the first source/drain region, in a region on an opposite side from the first source/drain region as viewed from the first gate trench, and a region on an opposite side from the first source/drain region as viewed from the second gate trench;
• wherein
• the fourth through sixth steps are performed prior to the seventh step, and
• the eighth step is performed subsequent to the seventh step.

A method of manufacturing a semiconductor device comprising:

• selectively forming an isolation region in a semiconductor layer to define an element formation region of one conductivity type, the element formation region having first, second and third portions, the second portion being sandwiched between the first and third portions;
• forming a punch-through stopper region of the one conductivity type and one of source and drain regions of the other conductivity type in the first portion of the element formation region;
• forming the other of the source and drain regions of the other conductivity type in the third portion of the element formation region;
• removing the second portion to form a trench between the first and third portions of the element formation region;
• filling the trench with a gate material layer with an intervention of a gate insulating film therebetween, the gate material layer being elongated over the element formation region;
• and
• patterning the gate material layer to form a gate electrode, wherein
• the patterning the gate material layer is carried out between the forming a punch-through stopper region of the one conductivity type and one of source and drain regions of the other conductivity type, and the forming the other of the source and drain regions of the other conductivity type.