Scanner optimization for reduced across-chip performance variation through non-contact electrical metrology

A method for reducing across-chip performance variation, comprising:

• measuring transistor electrical performance in production chips;
• converting the transistor electrical performance into a corresponding exposure dose value;
• inferring adjustments to exposure doses as a function of scan distance to facilitate achievement of increased performance of chips made in future production lots;
• and
• applying the corresponding exposure dose value to subsequent product chips to implement the adjustments to exposure doses.

A system that reduces across-chip performance variation during device fabrication, comprising:

• means for exposing a wafer with a programmed exposure dose range;
• means for determining a relationship between exposure dose and transistor performance;
• means for measuring transistor electrical performance;
• means for converting the transistor electrical performance into exposure dose values;
• and
• means for inferring adjustments to exposure doses as a function of scan distance to facilitate achievement of increased performance of chips made in future production lots.