US 7,460,852 B2 · Switch circuit and method of switching radio frequency signals

Abstract

An RF switch circuit and method for switching RF signals that may be fabricated using common integrated circuit materials such as silicon, particularly using insulating substrate technologies. The RF switch includes switching and shunting transistor groupings to alternatively couple RF input signals to a common RF node, each controlled by a switching control voltage (SW) or its inverse (SW_), which are approximately symmetrical about ground. The transistor groupings each comprise one or more insulating gate FET transistors connected together in a “stacked” series channel configuration, which increases the breakdown voltage across the series connected transistors and improves RF switch compression. A fully integrated RF switch is described including control logic and a negative voltage generator with the RF switch elements. In one embodiment, the fully integrated RF switch includes an oscillator, a charge pump, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit.

An RF switch circuit for switching RF signals, comprising:

(a) a first input port receiving a first RF input signal;
(b) a second input port receiving a second RF input signal;
(c) an RF common port;
(d) a first switch transistor grouping comprising a plurality of FETs having channels series coupled in a stacked configuration, one end of the series-connected channels being a first node coupled to the first input port, the opposite end of the series-connected channels being a second node coupled to the RF common port, the first switch transistor grouping having a control node that is driven by a switch control signal (SW) and is coupled to a gate of each of the plurality of FETs of the grouping via a corresponding gate impedance;
(e) a second switch transistor grouping comprising a plurality of FETs having channels series coupled in a stacked configuration, one end of the series-connected channels being a first node coupled to the second input port, the opposite end of the series-connected channels being a second node coupled to the RF common port, the first switch transistor grouping having a control node that is driven by an inverse (SW_) of the switch control signal (SW) and is coupled to a gate of each of the plurality of FETs of the grouping via a corresponding gate impedance;
(f) a first shunt transistor grouping comprising one or more FETs arranged in a stacked configuration, one end of the series-connected channels being a first node coupled to the second input port, the opposite end of the series-connected channels being a second node coupled to ground, the first shunt transistor grouping having a control node that is driven by a switch control signal (SW) and is coupled to a gate of each of the one or more FETs of the grouping via a corresponding gate impedance;
and
(g) a second shunt transistor grouping comprising one or more FETs arranged in a stacked configuration, one end of the series-connected channels being a first node coupled to the first input port, the opposite end of the series-connected channels being a second node coupled to ground, the first shunt transistor grouping having a control node that is driven by an inverse (SW_) of the switch control signal (SW) and is coupled to a gate of each of the one or more FETs of the grouping via a corresponding gate impedance;
(h) wherein the control signals SW and SW_have approximately equal magnitude but opposite polarity with respect to ground;
wherein, when SW is enabled, the first switch and shunt transistor groupings are enabled while the second switch and shunt transistor groupings are disabled, thereby passing the first RF input signal through to the RF common port and shunting the second RF input signal to ground;
and wherein when SW is disabled, the second switch and shunt transistor groupings are enabled while the first switch and shunt transistor groupings are disabled, thereby passing the second RF input signal through to the RF common port and shunting the first RF input signal to ground.

8 more elements

Facts

Application

11/582,206Filed 16 Oct 2006 · continuation

Priority

10 Oct 2001

Published

US 2007/0120103 A131 May 2007

Granted

2 Dec 2008

Term ends

Not estimatedThe source records don’t support an estimate.

Classification12 codes

H03K 17/6871
The devices being field-effect transistors: the output circuit comprising more than one controlled field-effect transistor
H01P 1/15
For switching or interrupting: by semiconductor devices
H03K 17/063
Modifications for ensuring a fully conducting state: in field-effect transistor switches
H03K 17/102
Modifications for increasing the maximum permissible switched voltage: in field-effect transistor switches

Family

Application60/328,353Us provisional application · filed 10 Oct 2001

Application10/267,531Parent of this continuation · filed 8 Oct 2002

Application10/922,135Parent of this continuation · filed 18 Aug 2004

US 6,804,502 B2Parent of this continuation · filed 12 Oct 2004

US 2007/0120103 A1Pre-grant publication · published 31 May 2007

US 7,123,898 B2Parent of this continuation

US 2003/0090313 A1Published application

US 2005/0017789 A1Published application

US 7,460,852 B2This patent

From the US filing history. Foreign family members aren’t listed.

Switch circuit and method of switching radio frequency signals

Life of this patent

Switch circuit and method of switching radio frequency signals

Life of this patent

Abstract

Claims27