Back to results
US 7,459,738 B2Granted
Ferroelectric memory element and method for manufacturing the same
AssigneeSeiko Epson Corporation
InventorsHiroaki Tamura, Koichi Kobayashi
Life of this patent
Estimating the term…
Abstract
A ferroelectric memory element has a memory cell array including memory cells arranged in a matrix configuration, each of the memory cells having a lower electrode, an upper electrode arranged in a direction intersecting the lower electrode, and a ferroelectric layer disposed at least in an intersecting area between the upper electrode and the lower electrode, wherein a hydrogen barrier film and a hydrogen barrier film are arranged at least below the memory cell array, and a bottom hydrogen barrier film is arranged below the memory cell array.
Claims10
A ferroelectric memory element comprising:
- a memory cell array having memory cells arranged in a matrix configuration, each of the memory cells having:
- a lower electrode;
- an upper electrode arranged in a direction intersecting the lower electrode;
- and
- a ferroelectric layer disposed at least in an intersecting area between the upper electrode and the lower electrode, wherein a first hydrogen barrier film directly contacts the lower electrode and a second hydrogen barrier film separate and apart from the first hydrogen barrier film directly contacts the upper electrode;
- and
- wherein the second hydrogen barrier film is formed at side walls of the lower electrode, the upper electrode, and the ferroelectric layer.
4 more elements
Dependencies are inferred from the claim text.