Methods of fabricating vertical channel field effect transistors having insulating layers thereon

A method of forming a transistor, the method comprising:

• forming a vertical channel protruding from a substrate including a source/drain region junction between the vertical channel and the substrate;
• forming an oxide layer on the vertical channel;
• removing the oxide layer to reduce a channel width of the vertical channel;
• and
• forming an insulating layer extending on a side wall of the vertical channel toward the substrate to beyond the source/drain region junction.

A method of forming a transistor, the method comprising:

• forming a mask insulating layer on a substrate, wherein the mask insulating layer comprises alternating oxide and nitride layers;
• forming a vertical channel protruding from the substrate including a source/drain region junction between the vertical channel and the substrate;
• and
• forming an insulating layer extending on a side wall of the vertical channel toward the substrate to beyond the source/drain region junction.

A method of fabricating a transistor comprising:

• etching a semiconductor substrate to form a fin;
• conformally forming a buffer oxide layer and a nitride layer on the semiconductor substrate;
• forming an insulating layer thicker than the fin on the semiconductor substrate with the nitride layer;
• polishing the insulating layer using chemical-mechanical polishing to expose the nitride layer and to form device isolating layers surrounding the nitride layer;
• successively recessing the nitride layer and the buffer oxide layer to form an exposed upper portion of the fin and to form a nitride liner adjacent to the lower sidewalls of the fin;
• forming a gate oxide layer on the exposed portion of the fin;
• and
• forming a gate electrode crossing over the fin.

A method of fabricating a transistor comprising:

• forming a mask insulating layer on a semiconductor substrate;
• patterning the mask insulating layer and the semiconductor substrate to form a fin that is a vertically protruding portion of the semiconductor substrate;
• conformally forming a buffer oxide layer and a nitride layer on the semiconductor substrate;
• forming an insulating layer thicker than the fin on the semiconductor substrate with the nitride layer;
• polishing the insulating layer using chemical-mechanical polishing to expose the nitride layer and to form device isolating layers surrounding the nitride layer;
• successively recessing the nitride layer and the buffer oxide layer to form exposed upper sidewalls of the fin and to form a nitride liner adjacent to the lower sidewalls of the fin;
• forming a gate oxide layer on the exposed upper sidewalls of the fin;
• and
• forming a gate electrode crossing over the fin.

A method of fabricating a transistor comprising:

• etching a semiconductor substrate to form a pillar including a couple of planar regions and a plurality of fins that connect the planar regions;
• conformally forming a buffer oxide layer and a nitride layer on the semiconductor substrate with the pillar;
• forming an insulating layer thicker than the pillar on the semiconductor substrate;
• polishing the insulating layer using chemical-mechanical polishing to expose the nitride layer and to form device isolating layers surrounding the pillar;
• successively recessing the nitride layer and the buffer oxide layer to form an exposed upper portion of the pillar;
• forming a gate oxide layer on the exposed portion of the pillar;
• and
• forming a gate electrode crossing over the fins.