Method of designing layout of semiconductor integrated circuit and apparatus for doing the same
AssigneeNEC Corporation
InventorKohei Uchida
Life of this patent
Estimating the term…
Abstract
A method of designing a layout of functional blocks and on-chip capacitors in a semiconductor integrated circuit, includes the steps of, in sequence, (a) placing a functional block, (b) placing an on-chip capacitor in an area which remains vacant after the step (a) has been carried out, (c) overlapping a portion of the functional block having been placed in the step (a) and a portion of the on-chip capacitor having been placed in the step (b) each other, if possible, and (d) placing an on-chip capacitor in a vacant area caused by carrying out the step (c).
Claims26
A method of designing a layout of functional blocks and on-chip capacitors in a semiconductor integrated circuit, comprising the steps of, in sequence:
- (a) placing a functional block;
- (b) placing an on-chip capacitor in an area which remains vacant after said step (a) has been carried out;
- (c) overlapping a portion of said functional block having been placed in said step (a) and a portion of said on-chip capacitor having been placed in said step (b) with each other creating a vacant area;
- and
- (d) placing an on-chip capacitor in said vacant area caused by carrying out said step (c).
A computer program stored on a computer readable medium for causing a computer to carry out a method of designing a layout of functional blocks and on-chip capacitors in a semiconductor integrated circuit, steps executed by said computer in accordance with said program including:
- (a) placing a functional block;
- (b) placing an on-chip capacitor in an area which is vacant after said step (a) has been carried out;
- (c) overlapping a portion of said functional block having been placed in said step (a) and a portion of said on-chip capacitor having been placed in said step (b) with each other creating a vacant area;
- and
- (d) placing an on-chip capacitor in said vacant area caused by carrying out said step (c).
A method of fabricating a semiconductor integrated circuit including a functional block and an on-chip capacitor both formed on a substrate or an electrically insulating layer, including:
- fabricating a functional block and an on-chip capacitor on a substrate or an electrically insulating layer in accordance with a layout which is determined by the steps of:
- (a) placing a functional block;
- (b) placing an on-chip capacitor in an area which is vacant after said step (a) has been carried out;
- (c) overlapping a portion of said functional block having been placed in said step (a) and a portion of said on-chip capacitor having been placed in said step (b) with each other creating a vacant area;
- and
- (d) placing an on-chip capacitor in said vacant area caused by carrying out said step (c).
An apparatus for designing a layout of functional blocks and on-chip capacitors in a semiconductor integrated circuit, comprising:
- a functional block placer which places a functional block;
- a first on-chip capacitor placer which places an on-chip capacitor in an area which remains vacant after said functional block has been placed by said functional block placer;
- an overlapping unit which overlaps a portion of said functional block having been placed by said functional block placer and a portion of said on-chip capacitor having been placed by said on-chip capacitor placer with each other creating a vacant area;
- and
- a second on-chip capacitor placer which places an on-chip capacitor in said vacant area resulted from overlapping said portions of said functional block and said on-chip capacitor.
Dependencies are inferred from the claim text.