Field effect transistor and fabrication method thereof
AssigneeSharp Kabushiki Kaisha
InventorAlberto O Adan
Life of this patent
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Abstract
A field effect transistor of the present invention includes, on a semiconductor substrate, (i) a fin section formed in a fin shape protruding from the substrate, (ii) a gate dielectric for covering a channel region section of the fin section, (iii) a gate electrode that is insulated from the channel region section by the gate dielectric and is formed on the channel region section and (iv) an insulating layer for covering a surface of the semiconductor substrate. The fin section is formed so as to extend from the semiconductor substrate through the insulating layer and protrudes outward from a surface of the insulating layer. In this way, the channel region of the fin section is physically in contact with the substrate.
Claims22
A field effect transistor, which is a metal-insulator-semiconductor field effect transistor having a fin section formed on a semiconductor substrate so as to protrude in a fin shape, comprising:
- a channel region section, a source region section, and a drain region section, which are formed at the fin section so that the channel region section is sandwiched by the source region section and the drain region section;
- the channel region being of the same conductivity type as the substrate, and
- physically and electrically in contact with the substrate;
- a gate dielectric thin film for coating the channel region section of the fin section;
- a gate electrode, insulated from the channel region section by the dielectric thin film, which is formed above the channel region section;
- and
- an insulating layer for covering a surface of the semiconductor substrate, wherein
- said fin section is formed so as to extend from the semiconductor substrate through the insulating layer and protrude outward from a surface of the insulating layer and wherein the source region section and the drain region section extend outwardly from the semiconductor substrate, are formed at the fin section sandwiched by the insulating layer, extend through the insulating layer and protrude from the surface of the insulating layer, and wherein
- said source region section and said drain region section are formed so as to extend across a surface region of the insulating layer.
A MOS transistor comprising:
- a substrate of a semiconducting material of a first conductivity type;
- a fin of the semiconductor material projecting from the substrate;
- an insulating pattern formed on the substrate, wherein the insulating pattern surrounds and abuts a lower portion of the fin and further wherein an upper portion of the fin projects above a plane defined by an upper surface of the insulating pattern;
- a source region, a channel region and a drain region sequentially arranged in a longitudinal direction along the fin, wherein the regions extend completely across the fin in a lateral direction, wherein the source region and the drain region extend into fin sections sandwiched by the insulating layer, and further wherein the source region and drain region are of a second conductivity type;
- a gate dielectric film formed on the channel region;
- and
- a gate electrode pattern electrically insulated from the channel region by the dielectric film and extending completely across the fin in a lateral direction, wherein
- said source region section and said drain region section are formed so as to extend across a surface region of the insulating layer.
Dependencies are inferred from the claim text.